9d56dd3b08
The old ctrl in/out routines are non-portable and unsuitable for cross-platform use. While drivers/sh has already been sanitized, there is still quite a lot of code that is not. This converts the arch/sh/ bits over, which permits us to flag the routines as deprecated whilst still building with -Werror for the architecture code, and to ensure that future users are not added. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
213 lines
5.4 KiB
C
213 lines
5.4 KiB
C
/*
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* linux/arch/sh/boards/renesas/sh7763rdp/setup.c
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*
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* Renesas Solutions sh7763rdp board
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*
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* Copyright (C) 2008 Renesas Solutions Corp.
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* Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/input.h>
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#include <linux/mtd/physmap.h>
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#include <linux/fb.h>
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#include <linux/io.h>
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#include <mach/sh7763rdp.h>
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#include <asm/sh_eth.h>
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#include <asm/sh7760fb.h>
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/* NOR Flash */
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static struct mtd_partition sh7763rdp_nor_flash_partitions[] = {
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{
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.name = "U-Boot",
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.offset = 0,
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.size = (2 * 128 * 1024),
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.mask_flags = MTD_WRITEABLE, /* Read-only */
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}, {
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.name = "Linux-Kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = (20 * 128 * 1024),
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}, {
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.name = "Root Filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data sh7763rdp_nor_flash_data = {
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.width = 2,
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.parts = sh7763rdp_nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions),
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};
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static struct resource sh7763rdp_nor_flash_resources[] = {
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[0] = {
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.name = "NOR Flash",
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.start = 0,
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.end = (64 * 1024 * 1024),
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device sh7763rdp_nor_flash_device = {
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.name = "physmap-flash",
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.resource = sh7763rdp_nor_flash_resources,
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.num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources),
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.dev = {
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.platform_data = &sh7763rdp_nor_flash_data,
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},
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};
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/*
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* SH-Ether
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*
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* SH Ether of SH7763 has multi IRQ handling.
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* (57,58,59 -> 57)
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*/
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static struct resource sh_eth_resources[] = {
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{
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.start = 0xFEE00800, /* use eth1 */
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.end = 0xFEE00F7C - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 57, /* irq number */
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_eth_plat_data sh7763_eth_pdata = {
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.phy = 1,
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.edmac_endian = EDMAC_LITTLE_ENDIAN,
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};
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static struct platform_device sh7763rdp_eth_device = {
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.name = "sh-eth",
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.resource = sh_eth_resources,
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.num_resources = ARRAY_SIZE(sh_eth_resources),
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.dev = {
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.platform_data = &sh7763_eth_pdata,
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},
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};
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/* SH7763 LCDC */
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static struct resource sh7763rdp_fb_resources[] = {
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{
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.start = 0xFFE80000,
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.end = 0xFFE80442 - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct fb_videomode sh7763fb_videomode = {
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.refresh = 60,
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.name = "VGA Monitor",
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.xres = 640,
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.yres = 480,
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.pixclock = 10000,
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.left_margin = 80,
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.right_margin = 24,
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.upper_margin = 30,
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.lower_margin = 1,
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.hsync_len = 96,
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.vsync_len = 1,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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.flag = FBINFO_FLAG_DEFAULT,
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};
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static struct sh7760fb_platdata sh7763fb_def_pdata = {
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.def_mode = &sh7763fb_videomode,
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.ldmtr = (LDMTR_TFT_COLOR_16|LDMTR_MCNT),
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.lddfr = LDDFR_16BPP_RGB565,
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.ldpmmr = 0x0000,
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.ldpspr = 0xFFFF,
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.ldaclnr = 0x0001,
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.ldickr = 0x1102,
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.rotate = 0,
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.novsync = 0,
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.blank = NULL,
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};
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static struct platform_device sh7763rdp_fb_device = {
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.name = "sh7760-lcdc",
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.resource = sh7763rdp_fb_resources,
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.num_resources = ARRAY_SIZE(sh7763rdp_fb_resources),
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.dev = {
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.platform_data = &sh7763fb_def_pdata,
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},
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};
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static struct platform_device *sh7763rdp_devices[] __initdata = {
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&sh7763rdp_nor_flash_device,
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&sh7763rdp_eth_device,
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&sh7763rdp_fb_device,
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};
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static int __init sh7763rdp_devices_setup(void)
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{
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return platform_add_devices(sh7763rdp_devices,
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ARRAY_SIZE(sh7763rdp_devices));
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}
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device_initcall(sh7763rdp_devices_setup);
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static void __init sh7763rdp_setup(char **cmdline_p)
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{
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/* Board version check */
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if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
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printk(KERN_INFO "RTE Standard Configuration\n");
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else
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printk(KERN_INFO "RTA Standard Configuration\n");
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/* USB pin select bits (clear bit 5-2 to 0) */
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__raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
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/* USBH setup port I controls to other (clear bits 4-9 to 0) */
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__raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR);
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/* Select USB Host controller */
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__raw_writew(0x00, USB_USBHSC);
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/* For LCD */
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/* set PTJ7-1, bits 15-2 of PJCR to 0 */
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__raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR);
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/* set PTI5, bits 11-10 of PICR to 0 */
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__raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR);
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__raw_writew(0, PORT_PKCR);
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__raw_writew(0, PORT_PLCR);
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/* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
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__raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
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/* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
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__raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
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/* For HAC */
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/* bit3-0 0100:HAC & SSI1 enable */
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__raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
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/* bit14 1:SSI_HAC_CLK enable */
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__raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
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/* SH-Ether */
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__raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
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__raw_writew(0x0, PORT_PFCR);
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__raw_writew(0x0, PORT_PFCR);
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__raw_writew(0x0, PORT_PFCR);
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/* MMC */
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/*selects SCIF and MMC other functions */
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__raw_writew(0x0001, PORT_PSEL0);
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/* MMC clock operates */
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__raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1);
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__raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR);
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__raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
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}
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static struct sh_machine_vector mv_sh7763rdp __initmv = {
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.mv_name = "sh7763drp",
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.mv_setup = sh7763rdp_setup,
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.mv_nr_irqs = 112,
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.mv_init_irq = init_sh7763rdp_IRQ,
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};
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