0848c94fb4
Currently the MFD core supports remapping MFD cell interrupts using an irqdomain but only if the MFD is being instantiated using device tree and only if the device tree bindings use the pattern of registering IPs in the device tree with compatible properties. This will be actively harmful for drivers which support non-DT platforms and use this pattern for their DT bindings as it will mean that the core will silently change remapping behaviour and it is also limiting for drivers which don't do DT with this particular pattern. There is also a potential fragility if there are interrupts not associated with MFD cells and all the cells are omitted from the device tree for some reason. Instead change the code to take an IRQ domain as an optional argument, allowing drivers to take the decision about the parent domain for their interrupts. The one current user of this feature is ab8500-core, it has the domain lookup pushed out into the driver. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> |
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Kconfig | ||
Makefile | ||
nvec_kbd.c | ||
nvec_paz00.c | ||
nvec_power.c | ||
nvec_ps2.c | ||
nvec-keytable.h | ||
nvec.c | ||
nvec.h | ||
README | ||
TODO |
NVEC: An NVidia compliant Embedded Controller Protocol Implemenation This is an implementation of the NVEC protocol used to communicate with an embedded controller (EC) via I2C bus. The EC is an I2C master while the host processor is the I2C slave. Requests from the host processor to the EC are started by triggering a gpio line. There is no written documentation of the protocol available to the public, but the source code[1] of the published nvec reference drivers can be a guide. This driver is currently only used by the AC100 project[2], but it is likely, that other Tegra boards (not yet mainlined, if ever) also use it. [1] e.g. http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=tree;f=arch/arm/mach-tegra/nvec;hb=android-tegra-2.6.32 [2] http://gitorious.org/ac100, http://launchpad.net/ac100