f80dff9da0
get_irqnr_preamble allows machines to take some action before entering the get_irqnr_and_base loop. On iop we enable cp6 access. arch_ret_to_user is added to the userspace return path to allow individual architectures to take actions, like disabling coprocessor access, before the final return to userspace. Per Nicolas Pitre's note, there is no need to cp_wait on the return to user as the latency to return is sufficient. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
42 lines
1.0 KiB
ArmAsm
42 lines
1.0 KiB
ArmAsm
/*
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* include/asm-arm/arch-shark/entry-macro.S
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*
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* Low-level IRQ helper macros for Shark platform
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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mov r4, #0xe0000000
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mov \irqstat, #0x0C
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strb \irqstat, [r4, #0x20] @outb(0x0C, 0x20) /* Poll command */
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ldrb \irqnr, [r4, #0x20] @irq = inb(0x20) & 7
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and \irqstat, \irqnr, #0x80
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teq \irqstat, #0
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beq 43f
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and \irqnr, \irqnr, #7
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teq \irqnr, #2
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bne 44f
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43: mov \irqstat, #0x0C
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strb \irqstat, [r4, #0xa0] @outb(0x0C, 0xA0) /* Poll command */
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ldrb \irqnr, [r4, #0xa0] @irq = (inb(0xA0) & 7) + 8
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and \irqstat, \irqnr, #0x80
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teq \irqstat, #0
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beq 44f
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and \irqnr, \irqnr, #7
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add \irqnr, \irqnr, #8
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44: teq \irqstat, #0
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.endm
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