ac919f0883
Add trap code for metag. At the lowest level Meta traps (and return from interrupt instruction - RTI) simply swap the PC and PCX registers and optionally toggle the interrupt status bit (ISTAT). Low level TBX code in tbipcx.S handles the core context save, determine the TBX signal number based on the core trigger that fired (using the TXSTATI status register), and call TBX signal handlers (mostly in traps.c) via a vector table. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Al Viro <viro@zeniv.linux.org.uk>
23 lines
789 B
ArmAsm
23 lines
789 B
ArmAsm
/* Pass a breakpoint through to Codescape */
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#include <asm/tbx.h>
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.text
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.global ___TBIUnExpXXX
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.type ___TBIUnExpXXX,function
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___TBIUnExpXXX:
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TSTT D0Ar2,#TBICTX_CRIT_BIT ! Result of nestable int call?
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BZ $LTBINormCase ! UnExpXXX at background level
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MOV D0Re0,TXMASKI ! Read TXMASKI
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XOR TXMASKI,D1Re0,D1Re0 ! Turn off BGNDHALT handling!
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OR D0Ar2,D0Ar2,D0Re0 ! Preserve bits cleared
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$LTBINormCase:
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MSETL [A0StP],D0Ar6,D0Ar4,D0Ar2 ! Save args on stack
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SETL [A0StP++],D0Ar2,D1Ar1 ! Init area for returned values
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SWITCH #0xC20208 ! Total stack frame size 8 Dwords
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! write back size 2 Dwords
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GETL D0Re0,D1Re0,[--A0StP] ! Get result
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SUB A0StP,A0StP,#(8*3) ! Recover stack frame
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MOV PC,D1RtP
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.size ___TBIUnExpXXX,.-___TBIUnExpXXX
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