82a6a81c2a
From: Xavier Gnata <xavier.gnata@gmail.com> Add support to INTEL_FALCON_RIDGE_2C controller and corresponding quirk to support suspend/resume. Tested against 4.7 master on a MacBook Air 11" 2015. Signed-off-by: Andreas Noever <andreas.noever@gmail.com> Reviewed-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
691 lines
18 KiB
C
691 lines
18 KiB
C
/*
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* Thunderbolt Cactus Ridge driver - NHI driver
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*
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* The NHI (native host interface) is the pci device that allows us to send and
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* receive frames from the thunderbolt bus.
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*
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* Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
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*/
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/dmi.h>
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#include "nhi.h"
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#include "nhi_regs.h"
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#include "tb.h"
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#define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring")
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static int ring_interrupt_index(struct tb_ring *ring)
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{
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int bit = ring->hop;
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if (!ring->is_tx)
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bit += ring->nhi->hop_count;
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return bit;
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}
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/**
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* ring_interrupt_active() - activate/deactivate interrupts for a single ring
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*
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* ring->nhi->lock must be held.
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*/
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static void ring_interrupt_active(struct tb_ring *ring, bool active)
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{
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int reg = REG_RING_INTERRUPT_BASE +
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ring_interrupt_index(ring) / 32 * 4;
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int bit = ring_interrupt_index(ring) & 31;
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int mask = 1 << bit;
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u32 old, new;
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old = ioread32(ring->nhi->iobase + reg);
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if (active)
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new = old | mask;
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else
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new = old & ~mask;
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dev_info(&ring->nhi->pdev->dev,
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"%s interrupt at register %#x bit %d (%#x -> %#x)\n",
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active ? "enabling" : "disabling", reg, bit, old, new);
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if (new == old)
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dev_WARN(&ring->nhi->pdev->dev,
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"interrupt for %s %d is already %s\n",
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RING_TYPE(ring), ring->hop,
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active ? "enabled" : "disabled");
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iowrite32(new, ring->nhi->iobase + reg);
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}
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/**
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* nhi_disable_interrupts() - disable interrupts for all rings
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*
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* Use only during init and shutdown.
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*/
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static void nhi_disable_interrupts(struct tb_nhi *nhi)
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{
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int i = 0;
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/* disable interrupts */
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for (i = 0; i < RING_INTERRUPT_REG_COUNT(nhi); i++)
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iowrite32(0, nhi->iobase + REG_RING_INTERRUPT_BASE + 4 * i);
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/* clear interrupt status bits */
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for (i = 0; i < RING_NOTIFY_REG_COUNT(nhi); i++)
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ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + 4 * i);
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}
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/* ring helper methods */
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static void __iomem *ring_desc_base(struct tb_ring *ring)
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{
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void __iomem *io = ring->nhi->iobase;
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io += ring->is_tx ? REG_TX_RING_BASE : REG_RX_RING_BASE;
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io += ring->hop * 16;
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return io;
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}
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static void __iomem *ring_options_base(struct tb_ring *ring)
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{
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void __iomem *io = ring->nhi->iobase;
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io += ring->is_tx ? REG_TX_OPTIONS_BASE : REG_RX_OPTIONS_BASE;
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io += ring->hop * 32;
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return io;
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}
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static void ring_iowrite16desc(struct tb_ring *ring, u32 value, u32 offset)
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{
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iowrite16(value, ring_desc_base(ring) + offset);
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}
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static void ring_iowrite32desc(struct tb_ring *ring, u32 value, u32 offset)
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{
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iowrite32(value, ring_desc_base(ring) + offset);
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}
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static void ring_iowrite64desc(struct tb_ring *ring, u64 value, u32 offset)
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{
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iowrite32(value, ring_desc_base(ring) + offset);
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iowrite32(value >> 32, ring_desc_base(ring) + offset + 4);
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}
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static void ring_iowrite32options(struct tb_ring *ring, u32 value, u32 offset)
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{
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iowrite32(value, ring_options_base(ring) + offset);
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}
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static bool ring_full(struct tb_ring *ring)
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{
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return ((ring->head + 1) % ring->size) == ring->tail;
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}
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static bool ring_empty(struct tb_ring *ring)
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{
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return ring->head == ring->tail;
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}
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/**
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* ring_write_descriptors() - post frames from ring->queue to the controller
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*
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* ring->lock is held.
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*/
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static void ring_write_descriptors(struct tb_ring *ring)
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{
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struct ring_frame *frame, *n;
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struct ring_desc *descriptor;
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list_for_each_entry_safe(frame, n, &ring->queue, list) {
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if (ring_full(ring))
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break;
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list_move_tail(&frame->list, &ring->in_flight);
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descriptor = &ring->descriptors[ring->head];
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descriptor->phys = frame->buffer_phy;
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descriptor->time = 0;
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descriptor->flags = RING_DESC_POSTED | RING_DESC_INTERRUPT;
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if (ring->is_tx) {
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descriptor->length = frame->size;
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descriptor->eof = frame->eof;
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descriptor->sof = frame->sof;
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}
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ring->head = (ring->head + 1) % ring->size;
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ring_iowrite16desc(ring, ring->head, ring->is_tx ? 10 : 8);
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}
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}
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/**
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* ring_work() - progress completed frames
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*
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* If the ring is shutting down then all frames are marked as canceled and
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* their callbacks are invoked.
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*
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* Otherwise we collect all completed frame from the ring buffer, write new
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* frame to the ring buffer and invoke the callbacks for the completed frames.
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*/
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static void ring_work(struct work_struct *work)
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{
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struct tb_ring *ring = container_of(work, typeof(*ring), work);
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struct ring_frame *frame;
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bool canceled = false;
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LIST_HEAD(done);
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mutex_lock(&ring->lock);
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if (!ring->running) {
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/* Move all frames to done and mark them as canceled. */
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list_splice_tail_init(&ring->in_flight, &done);
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list_splice_tail_init(&ring->queue, &done);
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canceled = true;
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goto invoke_callback;
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}
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while (!ring_empty(ring)) {
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if (!(ring->descriptors[ring->tail].flags
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& RING_DESC_COMPLETED))
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break;
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frame = list_first_entry(&ring->in_flight, typeof(*frame),
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list);
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list_move_tail(&frame->list, &done);
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if (!ring->is_tx) {
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frame->size = ring->descriptors[ring->tail].length;
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frame->eof = ring->descriptors[ring->tail].eof;
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frame->sof = ring->descriptors[ring->tail].sof;
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frame->flags = ring->descriptors[ring->tail].flags;
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if (frame->sof != 0)
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dev_WARN(&ring->nhi->pdev->dev,
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"%s %d got unexpected SOF: %#x\n",
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RING_TYPE(ring), ring->hop,
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frame->sof);
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/*
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* known flags:
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* raw not enabled, interupt not set: 0x2=0010
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* raw enabled: 0xa=1010
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* raw not enabled: 0xb=1011
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* partial frame (>MAX_FRAME_SIZE): 0xe=1110
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*/
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if (frame->flags != 0xa)
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dev_WARN(&ring->nhi->pdev->dev,
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"%s %d got unexpected flags: %#x\n",
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RING_TYPE(ring), ring->hop,
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frame->flags);
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}
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ring->tail = (ring->tail + 1) % ring->size;
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}
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ring_write_descriptors(ring);
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invoke_callback:
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mutex_unlock(&ring->lock); /* allow callbacks to schedule new work */
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while (!list_empty(&done)) {
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frame = list_first_entry(&done, typeof(*frame), list);
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/*
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* The callback may reenqueue or delete frame.
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* Do not hold on to it.
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*/
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list_del_init(&frame->list);
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frame->callback(ring, frame, canceled);
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}
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}
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int __ring_enqueue(struct tb_ring *ring, struct ring_frame *frame)
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{
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int ret = 0;
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mutex_lock(&ring->lock);
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if (ring->running) {
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list_add_tail(&frame->list, &ring->queue);
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ring_write_descriptors(ring);
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} else {
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ret = -ESHUTDOWN;
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}
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mutex_unlock(&ring->lock);
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return ret;
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}
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static struct tb_ring *ring_alloc(struct tb_nhi *nhi, u32 hop, int size,
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bool transmit)
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{
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struct tb_ring *ring = NULL;
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dev_info(&nhi->pdev->dev, "allocating %s ring %d of size %d\n",
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transmit ? "TX" : "RX", hop, size);
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mutex_lock(&nhi->lock);
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if (hop >= nhi->hop_count) {
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dev_WARN(&nhi->pdev->dev, "invalid hop: %d\n", hop);
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goto err;
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}
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if (transmit && nhi->tx_rings[hop]) {
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dev_WARN(&nhi->pdev->dev, "TX hop %d already allocated\n", hop);
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goto err;
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} else if (!transmit && nhi->rx_rings[hop]) {
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dev_WARN(&nhi->pdev->dev, "RX hop %d already allocated\n", hop);
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goto err;
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}
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ring = kzalloc(sizeof(*ring), GFP_KERNEL);
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if (!ring)
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goto err;
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mutex_init(&ring->lock);
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INIT_LIST_HEAD(&ring->queue);
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INIT_LIST_HEAD(&ring->in_flight);
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INIT_WORK(&ring->work, ring_work);
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ring->nhi = nhi;
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ring->hop = hop;
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ring->is_tx = transmit;
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ring->size = size;
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ring->head = 0;
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ring->tail = 0;
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ring->running = false;
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ring->descriptors = dma_alloc_coherent(&ring->nhi->pdev->dev,
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size * sizeof(*ring->descriptors),
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&ring->descriptors_dma, GFP_KERNEL | __GFP_ZERO);
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if (!ring->descriptors)
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goto err;
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if (transmit)
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nhi->tx_rings[hop] = ring;
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else
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nhi->rx_rings[hop] = ring;
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mutex_unlock(&nhi->lock);
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return ring;
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err:
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if (ring)
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mutex_destroy(&ring->lock);
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kfree(ring);
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mutex_unlock(&nhi->lock);
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return NULL;
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}
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struct tb_ring *ring_alloc_tx(struct tb_nhi *nhi, int hop, int size)
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{
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return ring_alloc(nhi, hop, size, true);
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}
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struct tb_ring *ring_alloc_rx(struct tb_nhi *nhi, int hop, int size)
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{
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return ring_alloc(nhi, hop, size, false);
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}
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/**
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* ring_start() - enable a ring
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*
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* Must not be invoked in parallel with ring_stop().
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*/
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void ring_start(struct tb_ring *ring)
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{
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mutex_lock(&ring->nhi->lock);
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mutex_lock(&ring->lock);
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if (ring->running) {
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dev_WARN(&ring->nhi->pdev->dev, "ring already started\n");
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goto err;
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}
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dev_info(&ring->nhi->pdev->dev, "starting %s %d\n",
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RING_TYPE(ring), ring->hop);
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ring_iowrite64desc(ring, ring->descriptors_dma, 0);
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if (ring->is_tx) {
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ring_iowrite32desc(ring, ring->size, 12);
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ring_iowrite32options(ring, 0, 4); /* time releated ? */
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ring_iowrite32options(ring,
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RING_FLAG_ENABLE | RING_FLAG_RAW, 0);
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} else {
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ring_iowrite32desc(ring,
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(TB_FRAME_SIZE << 16) | ring->size, 12);
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ring_iowrite32options(ring, 0xffffffff, 4); /* SOF EOF mask */
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ring_iowrite32options(ring,
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RING_FLAG_ENABLE | RING_FLAG_RAW, 0);
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}
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ring_interrupt_active(ring, true);
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ring->running = true;
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err:
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mutex_unlock(&ring->lock);
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mutex_unlock(&ring->nhi->lock);
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}
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/**
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* ring_stop() - shutdown a ring
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*
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* Must not be invoked from a callback.
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*
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* This method will disable the ring. Further calls to ring_tx/ring_rx will
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* return -ESHUTDOWN until ring_stop has been called.
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*
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* All enqueued frames will be canceled and their callbacks will be executed
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* with frame->canceled set to true (on the callback thread). This method
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* returns only after all callback invocations have finished.
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*/
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void ring_stop(struct tb_ring *ring)
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{
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mutex_lock(&ring->nhi->lock);
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mutex_lock(&ring->lock);
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dev_info(&ring->nhi->pdev->dev, "stopping %s %d\n",
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RING_TYPE(ring), ring->hop);
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if (!ring->running) {
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dev_WARN(&ring->nhi->pdev->dev, "%s %d already stopped\n",
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RING_TYPE(ring), ring->hop);
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goto err;
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}
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ring_interrupt_active(ring, false);
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ring_iowrite32options(ring, 0, 0);
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ring_iowrite64desc(ring, 0, 0);
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ring_iowrite16desc(ring, 0, ring->is_tx ? 10 : 8);
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ring_iowrite32desc(ring, 0, 12);
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ring->head = 0;
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ring->tail = 0;
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ring->running = false;
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err:
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mutex_unlock(&ring->lock);
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mutex_unlock(&ring->nhi->lock);
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/*
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* schedule ring->work to invoke callbacks on all remaining frames.
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*/
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schedule_work(&ring->work);
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flush_work(&ring->work);
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}
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/*
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* ring_free() - free ring
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*
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* When this method returns all invocations of ring->callback will have
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* finished.
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*
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* Ring must be stopped.
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*
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* Must NOT be called from ring_frame->callback!
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*/
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void ring_free(struct tb_ring *ring)
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{
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mutex_lock(&ring->nhi->lock);
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/*
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* Dissociate the ring from the NHI. This also ensures that
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* nhi_interrupt_work cannot reschedule ring->work.
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*/
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if (ring->is_tx)
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ring->nhi->tx_rings[ring->hop] = NULL;
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else
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ring->nhi->rx_rings[ring->hop] = NULL;
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if (ring->running) {
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dev_WARN(&ring->nhi->pdev->dev, "%s %d still running\n",
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RING_TYPE(ring), ring->hop);
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}
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dma_free_coherent(&ring->nhi->pdev->dev,
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ring->size * sizeof(*ring->descriptors),
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ring->descriptors, ring->descriptors_dma);
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ring->descriptors = NULL;
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ring->descriptors_dma = 0;
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dev_info(&ring->nhi->pdev->dev,
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"freeing %s %d\n",
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RING_TYPE(ring),
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ring->hop);
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mutex_unlock(&ring->nhi->lock);
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/**
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* ring->work can no longer be scheduled (it is scheduled only by
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* nhi_interrupt_work and ring_stop). Wait for it to finish before
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* freeing the ring.
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*/
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flush_work(&ring->work);
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mutex_destroy(&ring->lock);
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kfree(ring);
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}
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static void nhi_interrupt_work(struct work_struct *work)
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{
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struct tb_nhi *nhi = container_of(work, typeof(*nhi), interrupt_work);
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int value = 0; /* Suppress uninitialized usage warning. */
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int bit;
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int hop = -1;
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int type = 0; /* current interrupt type 0: TX, 1: RX, 2: RX overflow */
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struct tb_ring *ring;
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mutex_lock(&nhi->lock);
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/*
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* Starting at REG_RING_NOTIFY_BASE there are three status bitfields
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* (TX, RX, RX overflow). We iterate over the bits and read a new
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* dwords as required. The registers are cleared on read.
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*/
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for (bit = 0; bit < 3 * nhi->hop_count; bit++) {
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if (bit % 32 == 0)
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value = ioread32(nhi->iobase
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+ REG_RING_NOTIFY_BASE
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+ 4 * (bit / 32));
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if (++hop == nhi->hop_count) {
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hop = 0;
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type++;
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}
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if ((value & (1 << (bit % 32))) == 0)
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continue;
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if (type == 2) {
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dev_warn(&nhi->pdev->dev,
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"RX overflow for ring %d\n",
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hop);
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continue;
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}
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if (type == 0)
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ring = nhi->tx_rings[hop];
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else
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ring = nhi->rx_rings[hop];
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if (ring == NULL) {
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dev_warn(&nhi->pdev->dev,
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"got interrupt for inactive %s ring %d\n",
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type ? "RX" : "TX",
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hop);
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continue;
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}
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/* we do not check ring->running, this is done in ring->work */
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schedule_work(&ring->work);
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}
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mutex_unlock(&nhi->lock);
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}
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static irqreturn_t nhi_msi(int irq, void *data)
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{
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struct tb_nhi *nhi = data;
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schedule_work(&nhi->interrupt_work);
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return IRQ_HANDLED;
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}
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static int nhi_suspend_noirq(struct device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct tb *tb = pci_get_drvdata(pdev);
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thunderbolt_suspend(tb);
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return 0;
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}
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static int nhi_resume_noirq(struct device *dev)
|
|
{
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
struct tb *tb = pci_get_drvdata(pdev);
|
|
thunderbolt_resume(tb);
|
|
return 0;
|
|
}
|
|
|
|
static void nhi_shutdown(struct tb_nhi *nhi)
|
|
{
|
|
int i;
|
|
dev_info(&nhi->pdev->dev, "shutdown\n");
|
|
|
|
for (i = 0; i < nhi->hop_count; i++) {
|
|
if (nhi->tx_rings[i])
|
|
dev_WARN(&nhi->pdev->dev,
|
|
"TX ring %d is still active\n", i);
|
|
if (nhi->rx_rings[i])
|
|
dev_WARN(&nhi->pdev->dev,
|
|
"RX ring %d is still active\n", i);
|
|
}
|
|
nhi_disable_interrupts(nhi);
|
|
/*
|
|
* We have to release the irq before calling flush_work. Otherwise an
|
|
* already executing IRQ handler could call schedule_work again.
|
|
*/
|
|
devm_free_irq(&nhi->pdev->dev, nhi->pdev->irq, nhi);
|
|
flush_work(&nhi->interrupt_work);
|
|
mutex_destroy(&nhi->lock);
|
|
}
|
|
|
|
static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
{
|
|
struct tb_nhi *nhi;
|
|
struct tb *tb;
|
|
int res;
|
|
|
|
res = pcim_enable_device(pdev);
|
|
if (res) {
|
|
dev_err(&pdev->dev, "cannot enable PCI device, aborting\n");
|
|
return res;
|
|
}
|
|
|
|
res = pci_enable_msi(pdev);
|
|
if (res) {
|
|
dev_err(&pdev->dev, "cannot enable MSI, aborting\n");
|
|
return res;
|
|
}
|
|
|
|
res = pcim_iomap_regions(pdev, 1 << 0, "thunderbolt");
|
|
if (res) {
|
|
dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
|
|
return res;
|
|
}
|
|
|
|
nhi = devm_kzalloc(&pdev->dev, sizeof(*nhi), GFP_KERNEL);
|
|
if (!nhi)
|
|
return -ENOMEM;
|
|
|
|
nhi->pdev = pdev;
|
|
/* cannot fail - table is allocated bin pcim_iomap_regions */
|
|
nhi->iobase = pcim_iomap_table(pdev)[0];
|
|
nhi->hop_count = ioread32(nhi->iobase + REG_HOP_COUNT) & 0x3ff;
|
|
if (nhi->hop_count != 12 && nhi->hop_count != 32)
|
|
dev_warn(&pdev->dev, "unexpected hop count: %d\n",
|
|
nhi->hop_count);
|
|
INIT_WORK(&nhi->interrupt_work, nhi_interrupt_work);
|
|
|
|
nhi->tx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
|
|
sizeof(*nhi->tx_rings), GFP_KERNEL);
|
|
nhi->rx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
|
|
sizeof(*nhi->rx_rings), GFP_KERNEL);
|
|
if (!nhi->tx_rings || !nhi->rx_rings)
|
|
return -ENOMEM;
|
|
|
|
nhi_disable_interrupts(nhi); /* In case someone left them on. */
|
|
res = devm_request_irq(&pdev->dev, pdev->irq, nhi_msi,
|
|
IRQF_NO_SUSPEND, /* must work during _noirq */
|
|
"thunderbolt", nhi);
|
|
if (res) {
|
|
dev_err(&pdev->dev, "request_irq failed, aborting\n");
|
|
return res;
|
|
}
|
|
|
|
mutex_init(&nhi->lock);
|
|
|
|
pci_set_master(pdev);
|
|
|
|
/* magic value - clock related? */
|
|
iowrite32(3906250 / 10000, nhi->iobase + 0x38c00);
|
|
|
|
dev_info(&nhi->pdev->dev, "NHI initialized, starting thunderbolt\n");
|
|
tb = thunderbolt_alloc_and_start(nhi);
|
|
if (!tb) {
|
|
/*
|
|
* At this point the RX/TX rings might already have been
|
|
* activated. Do a proper shutdown.
|
|
*/
|
|
nhi_shutdown(nhi);
|
|
return -EIO;
|
|
}
|
|
pci_set_drvdata(pdev, tb);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void nhi_remove(struct pci_dev *pdev)
|
|
{
|
|
struct tb *tb = pci_get_drvdata(pdev);
|
|
struct tb_nhi *nhi = tb->nhi;
|
|
thunderbolt_shutdown_and_free(tb);
|
|
nhi_shutdown(nhi);
|
|
}
|
|
|
|
/*
|
|
* The tunneled pci bridges are siblings of us. Use resume_noirq to reenable
|
|
* the tunnels asap. A corresponding pci quirk blocks the downstream bridges
|
|
* resume_noirq until we are done.
|
|
*/
|
|
static const struct dev_pm_ops nhi_pm_ops = {
|
|
.suspend_noirq = nhi_suspend_noirq,
|
|
.resume_noirq = nhi_resume_noirq,
|
|
.freeze_noirq = nhi_suspend_noirq, /*
|
|
* we just disable hotplug, the
|
|
* pci-tunnels stay alive.
|
|
*/
|
|
.restore_noirq = nhi_resume_noirq,
|
|
};
|
|
|
|
static struct pci_device_id nhi_ids[] = {
|
|
/*
|
|
* We have to specify class, the TB bridges use the same device and
|
|
* vendor (sub)id on gen 1 and gen 2 controllers.
|
|
*/
|
|
{
|
|
.class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
|
|
.vendor = PCI_VENDOR_ID_INTEL,
|
|
.device = PCI_DEVICE_ID_INTEL_LIGHT_RIDGE,
|
|
.subvendor = 0x2222, .subdevice = 0x1111,
|
|
},
|
|
{
|
|
.class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
|
|
.vendor = PCI_VENDOR_ID_INTEL,
|
|
.device = PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
|
|
.subvendor = 0x2222, .subdevice = 0x1111,
|
|
},
|
|
{
|
|
.class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
|
|
.vendor = PCI_VENDOR_ID_INTEL,
|
|
.device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI,
|
|
.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
|
|
},
|
|
{
|
|
.class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
|
|
.vendor = PCI_VENDOR_ID_INTEL,
|
|
.device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI,
|
|
.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
|
|
},
|
|
{ 0,}
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, nhi_ids);
|
|
MODULE_LICENSE("GPL");
|
|
|
|
static struct pci_driver nhi_driver = {
|
|
.name = "thunderbolt",
|
|
.id_table = nhi_ids,
|
|
.probe = nhi_probe,
|
|
.remove = nhi_remove,
|
|
.driver.pm = &nhi_pm_ops,
|
|
};
|
|
|
|
static int __init nhi_init(void)
|
|
{
|
|
if (!dmi_match(DMI_BOARD_VENDOR, "Apple Inc."))
|
|
return -ENOSYS;
|
|
return pci_register_driver(&nhi_driver);
|
|
}
|
|
|
|
static void __exit nhi_unload(void)
|
|
{
|
|
pci_unregister_driver(&nhi_driver);
|
|
}
|
|
|
|
module_init(nhi_init);
|
|
module_exit(nhi_unload);
|