bcb63314e2
Drop the FSF's postal address from the source code files that typically
contain mostly the license text. Of the 628 removed instances, 578 are
outdated.
The patch has been created with the following command without manual edits:
git grep -l "675 Mass Ave\|59 Temple Place\|51 Franklin St" -- \
drivers/media/ include/media|while read i; do i=$i perl -e '
open(F,"< $ENV{i}");
$a=join("", <F>);
$a =~ s/[ \t]*\*\n.*You should.*\n.*along with.*\n.*(\n.*USA.*$)?\n//m
&& $a =~ s/(^.*)Or, (point your browser to) /$1To obtain the license, $2\n$1/m;
close(F);
open(F, "> $ENV{i}");
print F $a;
close(F);'; done
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
96 lines
2.3 KiB
C
96 lines
2.3 KiB
C
/*
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* Driver for the Conexant CX25821 PCIe bridge
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*
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* Copyright (C) 2009 Conexant Systems Inc.
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* Authors <shu.lin@conexant.com>, <hiep.huynh@conexant.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include "cx25821.h"
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/********************* GPIO stuffs *********************/
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void cx25821_set_gpiopin_direction(struct cx25821_dev *dev,
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int pin_number, int pin_logic_value)
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{
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int bit = pin_number;
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u32 gpio_oe_reg = GPIO_LO_OE;
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u32 gpio_register = 0;
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u32 value = 0;
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/* Check for valid pinNumber */
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if (pin_number >= 47)
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return;
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if (pin_number > 31) {
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bit = pin_number - 31;
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gpio_oe_reg = GPIO_HI_OE;
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}
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/* Here we will make sure that the GPIOs 0 and 1 are output. keep the
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* rest as is */
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gpio_register = cx_read(gpio_oe_reg);
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if (pin_logic_value == 1)
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value = gpio_register | Set_GPIO_Bit(bit);
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else
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value = gpio_register & Clear_GPIO_Bit(bit);
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cx_write(gpio_oe_reg, value);
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}
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EXPORT_SYMBOL(cx25821_set_gpiopin_direction);
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static void cx25821_set_gpiopin_logicvalue(struct cx25821_dev *dev,
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int pin_number, int pin_logic_value)
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{
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int bit = pin_number;
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u32 gpio_reg = GPIO_LO;
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u32 value = 0;
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/* Check for valid pinNumber */
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if (pin_number >= 47)
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return;
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/* change to output direction */
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cx25821_set_gpiopin_direction(dev, pin_number, 0);
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if (pin_number > 31) {
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bit = pin_number - 31;
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gpio_reg = GPIO_HI;
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}
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value = cx_read(gpio_reg);
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if (pin_logic_value == 0)
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value &= Clear_GPIO_Bit(bit);
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else
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value |= Set_GPIO_Bit(bit);
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cx_write(gpio_reg, value);
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}
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void cx25821_gpio_init(struct cx25821_dev *dev)
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{
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if (dev == NULL)
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return;
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switch (dev->board) {
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case CX25821_BOARD_CONEXANT_ATHENA10:
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default:
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/* set GPIO 5 to select the path for Medusa/Athena */
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cx25821_set_gpiopin_logicvalue(dev, 5, 1);
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mdelay(20);
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break;
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}
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}
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