af3f1de4e7
Device tree binding documentation for Broadcom NSP IOMUX driver Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
80 lines
1.6 KiB
Plaintext
80 lines
1.6 KiB
Plaintext
Broadcom NSP (Northstar plus) IOMUX Controller
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The NSP IOMUX controller supports group based mux configuration. In
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addition, certain pins can be muxed to GPIO function individually.
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Required properties:
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- compatible:
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Must be "brcm,nsp-pinmux"
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- reg:
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Should contain the register physical address and length for each of
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GPIO_CONTROL0, GP_AUX_SEL and IPROC_CONFIG IOMUX registers
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Properties in subnodes:
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- function:
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The mux function to select
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- groups:
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The list of groups to select with a given function
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For more details, refer to
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Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
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For example:
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pinmux: pinmux@1803f1c0 {
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compatible = "brcm,nsp-pinmux";
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reg = <0x1803f1c0 0x04>,
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<0x18030028 0x04>,
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<0x1803f408 0x04>;
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pinctrl-names = "default";
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pinctrl-0 = <&pwm &gpio_b &nand_sel>;
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pwm: pwm {
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function = "pwm";
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groups = "pwm0_grp", "pwm1_grp";
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};
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gpio_b: gpio_b {
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function = "gpio_b";
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groups = "gpio_b_0_grp", "gpio_b_1_grp";
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};
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nand_sel: nand_sel {
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function = "nand";
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groups = "nand_grp";
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};
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};
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List of supported functions and groups in Northstar Plus:
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"spi": "spi_grp"
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"i2c": "i2c_grp"
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"mdio": "mdio_grp"
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"pwm": "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp"
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"gpio_b": "gpio_b_0_grp", "gpio_b_1_grp", "gpio_b_2_grp", "gpio_b_3_grp"
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"uart1": "uart1_grp"
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"uart2": "uart2_grp"
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"synce": "synce_grp"
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"sata_led_grps": "sata0_led_grp", "sata1_led_grp"
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"xtal_out": "xtal_out_grp"
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"sdio": "sdio_pwr_grp", "sdio_1p8v_grp"
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"switch_led": "switch_p05_led0_grp", "switch_p05_led1_grp"
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"nand": "nand_grp"
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"emmc": "emmc_grp"
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