1837649fd3
Add ECC information to synopsys ddr memory controller. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
16 lines
461 B
Plaintext
16 lines
461 B
Plaintext
Binding for Synopsys IntelliDDR Multi Protocol Memory Controller
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This controller has an optional ECC support in half-bus width (16-bit)
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configuration. The ECC controller corrects one bit error and detects
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two bit errors.
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Required properties:
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- compatible: Should be 'xlnx,zynq-ddrc-a05'
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- reg: Base address and size of the controllers memory area
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Example:
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memory-controller@f8006000 {
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compatible = "xlnx,zynq-ddrc-a05";
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reg = <0xf8006000 0x1000>;
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};
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