Russ Anderson
895309ff6f
[IA64] Update processor_info features
Add the printing of additional processor features to proc_features.
Based on Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software
Developer's Manual" (January 2006) fields (pages 2:430-2:432).
This patch gets the features back in sync with the spec.
Sample output before:
--------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/processor_info
XIP,XPSR,XFS implemented : On NoCtrl
XR1-XR3 implemented : On NoCtrl
Disable dynamic predicate prediction : NotImpl
Disable processor physical number : NotImpl
Disable dynamic data cache prefetch : NotImpl
Disable dynamic inst cache prefetch : NotImpl
Disable dynamic branch prediction : NotImpl
Disable BINIT on processor time-out : On Ctrl
Disable dynamic power management (DPM) : NotImpl
Disable coherency : NotImpl
Disable cache : NotImpl
Enable CMCI promotion : Off Ctrl
Enable MCA to BINIT promotion : Off Ctrl
Enable MCA promotion : NotImpl
Enable BERR promotion : NotImpl
cobra:~ #
--------------------------------------------------------------
Sample output after:
--------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/processor_info
Unimplemented instruction address fault : NotImpl
INIT, PMI, and LINT pins : NotImpl
Simple unimplimented instr addresses : On NoCtrl
Variable P-state performance : NotImpl
Virtual machine features implemeted : On NoCtrl
XIP,XPSR,XFS implemented : On NoCtrl
XR1-XR3 implemented : On NoCtrl
Disable dynamic predicate prediction : NotImpl
Disable processor physical number : NotImpl
Disable dynamic data cache prefetch : NotImpl
Disable dynamic inst cache prefetch : NotImpl
Disable dynamic branch prediction : NotImpl
Disable P-states : Off Ctrl
Enable MCA on Data Poisoning : Off Ctrl
Enable vmsw instruction : On Ctrl
Enable extern environmental notification : NotImpl
Disable BINIT on processor time-out : On Ctrl
Disable dynamic power management (DPM) : NotImpl
Disable coherency : NotImpl
Disable cache : NotImpl
Enable CMCI promotion : Off Ctrl
Enable MCA to BINIT promotion : Off Ctrl
Enable MCA promotion : NotImpl
Enable BERR promotion : NotImpl
cobra:~ #
--------------------------------------------------------------
Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
2006-12-07 11:06:35 -08:00
..
2006-10-03 23:01:26 +02:00
2006-10-17 14:57:33 -07:00
2006-12-07 09:51:35 -08:00
2006-12-07 09:51:35 -08:00
2006-12-07 09:51:35 -08:00
2006-09-26 09:47:30 -07:00
2006-10-02 07:57:20 -07:00
2006-12-07 09:51:35 -08:00
2006-11-16 09:38:35 -08:00
2006-11-16 09:38:02 -08:00
2006-11-16 09:38:35 -08:00
2006-12-07 10:48:19 -08:00
2006-12-07 09:51:35 -08:00
2006-10-05 15:10:12 +01:00
2006-12-07 09:51:35 -08:00
2006-09-26 15:20:35 -07:00
2006-10-31 14:30:34 -08:00
2006-09-26 14:44:37 -07:00
2006-12-07 09:51:35 -08:00
2006-10-04 07:55:29 -07:00
2006-10-02 07:57:17 -07:00
2006-10-17 14:54:19 -07:00
2006-12-07 11:06:35 -08:00
2006-12-07 10:48:19 -08:00
2006-10-17 14:28:16 -07:00
2006-10-02 07:57:23 -07:00
2006-12-07 09:51:35 -08:00
2006-10-31 14:32:10 -08:00
2006-09-26 14:44:37 -07:00
2006-12-07 09:51:35 -08:00
2006-12-07 09:51:35 -08:00
2006-12-05 19:36:26 +00:00
2006-10-17 14:51:49 -07:00
2006-09-27 08:26:08 -07:00
2006-09-26 08:48:50 -07:00
2006-10-27 15:34:51 -07:00