7787380336
net_dma can cause data to be copied to a stale mapping if a copy-on-write fault occurs during dma. The application sees missing data. The following trace is triggered by modifying the kernel to WARN if it ever triggers copy-on-write on a page that is undergoing dma: WARNING: CPU: 24 PID: 2529 at lib/dma-debug.c:485 debug_dma_assert_idle+0xd2/0x120() ioatdma 0000:00:04.0: DMA-API: cpu touching an active dma mapped page [pfn=0x16bcd9] Modules linked in: iTCO_wdt iTCO_vendor_support ioatdma lpc_ich pcspkr dca CPU: 24 PID: 2529 Comm: linbug Tainted: G W 3.13.0-rc1+ #353 00000000000001e5 ffff88016f45f688 ffffffff81751041 ffff88017ab0ef70 ffff88016f45f6d8 ffff88016f45f6c8 ffffffff8104ed9c ffffffff810f3646 ffff8801768f4840 0000000000000282 ffff88016f6cca10 00007fa2bb699349 Call Trace: [<ffffffff81751041>] dump_stack+0x46/0x58 [<ffffffff8104ed9c>] warn_slowpath_common+0x8c/0xc0 [<ffffffff810f3646>] ? ftrace_pid_func+0x26/0x30 [<ffffffff8104ee86>] warn_slowpath_fmt+0x46/0x50 [<ffffffff8139c062>] debug_dma_assert_idle+0xd2/0x120 [<ffffffff81154a40>] do_wp_page+0xd0/0x790 [<ffffffff811582ac>] handle_mm_fault+0x51c/0xde0 [<ffffffff813830b9>] ? copy_user_enhanced_fast_string+0x9/0x20 [<ffffffff8175fc2c>] __do_page_fault+0x19c/0x530 [<ffffffff8175c196>] ? _raw_spin_lock_bh+0x16/0x40 [<ffffffff810f3539>] ? trace_clock_local+0x9/0x10 [<ffffffff810fa1f4>] ? rb_reserve_next_event+0x64/0x310 [<ffffffffa0014c00>] ? ioat2_dma_prep_memcpy_lock+0x60/0x130 [ioatdma] [<ffffffff8175ffce>] do_page_fault+0xe/0x10 [<ffffffff8175c862>] page_fault+0x22/0x30 [<ffffffff81643991>] ? __kfree_skb+0x51/0xd0 [<ffffffff813830b9>] ? copy_user_enhanced_fast_string+0x9/0x20 [<ffffffff81388ea2>] ? memcpy_toiovec+0x52/0xa0 [<ffffffff8164770f>] skb_copy_datagram_iovec+0x5f/0x2a0 [<ffffffff8169d0f4>] tcp_rcv_established+0x674/0x7f0 [<ffffffff816a68c5>] tcp_v4_do_rcv+0x2e5/0x4a0 [..] ---[ end trace e30e3b01191b7617 ]--- Mapped at: [<ffffffff8139c169>] debug_dma_map_page+0xb9/0x160 [<ffffffff8142bf47>] dma_async_memcpy_pg_to_pg+0x127/0x210 [<ffffffff8142cce9>] dma_memcpy_pg_to_iovec+0x119/0x1f0 [<ffffffff81669d3c>] dma_skb_copy_datagram_iovec+0x11c/0x2b0 [<ffffffff8169d1ca>] tcp_rcv_established+0x74a/0x7f0: ...the problem is that the receive path falls back to cpu-copy in several locations and this trace is just one of the areas. A few options were considered to fix this: 1/ sync all dma whenever a cpu copy branch is taken 2/ modify the page fault handler to hold off while dma is in-flight Option 1 adds yet more cpu overhead to an "offload" that struggles to compete with cpu-copy. Option 2 adds checks for behavior that is already documented as broken when using get_user_pages(). At a minimum a debug mode is warranted to catch and flag these violations of the dma-api vs get_user_pages(). Thanks to David for his reproducer. Cc: <stable@vger.kernel.org> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Alexander Duyck <alexander.h.duyck@intel.com> Reported-by: David Whipple <whipple@securedatainnovations.ch> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
388 lines
10 KiB
Plaintext
388 lines
10 KiB
Plaintext
#
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# DMA engine configuration
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#
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menuconfig DMADEVICES
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bool "DMA Engine support"
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depends on HAS_DMA
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help
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DMA engines can do asynchronous data transfers without
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involving the host CPU. Currently, this framework can be
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used to offload memory copies in the network stack and
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RAID operations in the MD driver. This menu only presents
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DMA Device drivers supported by the configured arch, it may
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be empty in some cases.
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config DMADEVICES_DEBUG
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bool "DMA Engine debugging"
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depends on DMADEVICES != n
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help
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This is an option for use by developers; most people should
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say N here. This enables DMA engine core and driver debugging.
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config DMADEVICES_VDEBUG
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bool "DMA Engine verbose debugging"
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depends on DMADEVICES_DEBUG != n
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help
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This is an option for use by developers; most people should
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say N here. This enables deeper (more verbose) debugging of
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the DMA engine core and drivers.
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if DMADEVICES
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comment "DMA Devices"
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config INTEL_MID_DMAC
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tristate "Intel MID DMA support for Peripheral DMA controllers"
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depends on PCI && X86
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select DMA_ENGINE
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default n
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help
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Enable support for the Intel(R) MID DMA engine present
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in Intel MID chipsets.
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Say Y here if you have such a chipset.
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If unsure, say N.
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config ASYNC_TX_ENABLE_CHANNEL_SWITCH
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bool
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config AMBA_PL08X
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bool "ARM PrimeCell PL080 or PL081 support"
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depends on ARM_AMBA
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Platform has a PL08x DMAC device
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which can provide DMA engine support
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config INTEL_IOATDMA
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tristate "Intel I/OAT DMA support"
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depends on PCI && X86
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select DMA_ENGINE
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select DMA_ENGINE_RAID
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select DCA
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help
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Enable support for the Intel(R) I/OAT DMA engine present
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in recent Intel Xeon chipsets.
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Say Y here if you have such a chipset.
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If unsure, say N.
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config INTEL_IOP_ADMA
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tristate "Intel IOP ADMA support"
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depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
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select DMA_ENGINE
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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help
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Enable support for the Intel(R) IOP Series RAID engines.
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source "drivers/dma/dw/Kconfig"
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config AT_HDMAC
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tristate "Atmel AHB DMA support"
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depends on ARCH_AT91
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select DMA_ENGINE
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help
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Support the Atmel AHB DMA controller.
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config FSL_DMA
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tristate "Freescale Elo series DMA support"
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depends on FSL_SOC
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select DMA_ENGINE
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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---help---
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Enable support for the Freescale Elo series DMA controllers.
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The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
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EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
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some Txxx and Bxxx parts.
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config MPC512X_DMA
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tristate "Freescale MPC512x built-in DMA engine support"
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depends on PPC_MPC512x || PPC_MPC831x
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select DMA_ENGINE
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---help---
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Enable support for the Freescale MPC512x built-in DMA engine.
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source "drivers/dma/bestcomm/Kconfig"
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config MV_XOR
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bool "Marvell XOR engine support"
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depends on PLAT_ORION
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select DMA_ENGINE
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select DMA_ENGINE_RAID
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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---help---
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Enable support for the Marvell XOR engine.
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config MX3_IPU
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bool "MX3x Image Processing Unit support"
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depends on ARCH_MXC
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select DMA_ENGINE
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default y
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help
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If you plan to use the Image Processing unit in the i.MX3x, say
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Y here. If unsure, select Y.
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config MX3_IPU_IRQS
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int "Number of dynamically mapped interrupts for IPU"
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depends on MX3_IPU
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range 2 137
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default 4
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help
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Out of 137 interrupt sources on i.MX31 IPU only very few are used.
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To avoid bloating the irq_desc[] array we allocate a sufficient
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number of IRQ slots and map them dynamically to specific sources.
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config TXX9_DMAC
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tristate "Toshiba TXx9 SoC DMA support"
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depends on MACH_TX49XX || MACH_TX39XX
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select DMA_ENGINE
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help
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Support the TXx9 SoC internal DMA controller. This can be
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integrated in chips such as the Toshiba TX4927/38/39.
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config TEGRA20_APB_DMA
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bool "NVIDIA Tegra20 APB DMA support"
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depends on ARCH_TEGRA
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select DMA_ENGINE
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help
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Support for the NVIDIA Tegra20 APB DMA controller driver. The
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DMA controller is having multiple DMA channel which can be
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configured for different peripherals like audio, UART, SPI,
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I2C etc which is in APB bus.
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This DMA controller transfers data from memory to peripheral fifo
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or vice versa. It does not support memory to memory data transfer.
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config S3C24XX_DMAC
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tristate "Samsung S3C24XX DMA support"
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depends on ARCH_S3C24XX && !S3C24XX_DMA
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support for the Samsung S3C24XX DMA controller driver. The
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DMA controller is having multiple DMA channels which can be
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configured for different peripherals like audio, UART, SPI.
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The DMA controller can transfer data from memory to peripheral,
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periphal to memory, periphal to periphal and memory to memory.
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source "drivers/dma/sh/Kconfig"
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config COH901318
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bool "ST-Ericsson COH901318 DMA support"
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select DMA_ENGINE
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depends on ARCH_U300
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help
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Enable support for ST-Ericsson COH 901 318 DMA.
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config STE_DMA40
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bool "ST-Ericsson DMA40 support"
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depends on ARCH_U8500
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select DMA_ENGINE
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help
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Support for ST-Ericsson DMA40 controller
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config AMCC_PPC440SPE_ADMA
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tristate "AMCC PPC440SPe ADMA support"
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depends on 440SPe || 440SP
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select DMA_ENGINE
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select DMA_ENGINE_RAID
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select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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help
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Enable support for the AMCC PPC440SPe RAID engines.
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config TIMB_DMA
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tristate "Timberdale FPGA DMA support"
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depends on MFD_TIMBERDALE || HAS_IOMEM
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select DMA_ENGINE
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help
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Enable support for the Timberdale FPGA DMA engine.
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config SIRF_DMA
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tristate "CSR SiRFprimaII/SiRFmarco DMA support"
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depends on ARCH_SIRF
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select DMA_ENGINE
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help
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Enable support for the CSR SiRFprimaII DMA engine.
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config TI_EDMA
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bool "TI EDMA support"
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depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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select TI_PRIV_EDMA
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default n
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help
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Enable support for the TI EDMA controller. This DMA
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engine is found on TI DaVinci and AM33xx parts.
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config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
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bool
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config PL330_DMA
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tristate "DMA API Driver for PL330"
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select DMA_ENGINE
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depends on ARM_AMBA
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help
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Select if your platform has one or more PL330 DMACs.
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You need to provide platform specific settings via
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platform_data for a dma-pl330 device.
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config PCH_DMA
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tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
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depends on PCI && X86
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select DMA_ENGINE
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help
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Enable support for Intel EG20T PCH DMA engine.
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This driver also can be used for LAPIS Semiconductor IOH(Input/
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Output Hub), ML7213, ML7223 and ML7831.
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ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
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for MP(Media Phone) use and ML7831 IOH is for general purpose use.
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ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
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ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
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config IMX_SDMA
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tristate "i.MX SDMA support"
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depends on ARCH_MXC
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select DMA_ENGINE
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help
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Support the i.MX SDMA engine. This engine is integrated into
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Freescale i.MX25/31/35/51/53 chips.
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config IMX_DMA
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tristate "i.MX DMA support"
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depends on ARCH_MXC
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select DMA_ENGINE
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help
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Support the i.MX DMA engine. This engine is integrated into
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Freescale i.MX1/21/27 chips.
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config MXS_DMA
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bool "MXS DMA support"
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depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
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select STMP_DEVICE
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select DMA_ENGINE
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help
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Support the MXS DMA engine. This engine including APBH-DMA
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and APBX-DMA is integrated into Freescale i.MX23/28 chips.
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config EP93XX_DMA
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bool "Cirrus Logic EP93xx DMA support"
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depends on ARCH_EP93XX
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select DMA_ENGINE
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help
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Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
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config DMA_SA11X0
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tristate "SA-11x0 DMA support"
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depends on ARCH_SA1100
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support the DMA engine found on Intel StrongARM SA-1100 and
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SA-1110 SoCs. This DMA engine can only be used with on-chip
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devices.
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config MMP_TDMA
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bool "MMP Two-Channel DMA support"
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depends on ARCH_MMP
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select DMA_ENGINE
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help
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Support the MMP Two-Channel DMA engine.
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This engine used for MMP Audio DMA and pxa910 SQU.
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Say Y here if you enabled MMP ADMA, otherwise say N.
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config DMA_OMAP
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tristate "OMAP DMA support"
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depends on ARCH_OMAP
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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config TI_CPPI41
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tristate "AM33xx CPPI41 DMA support"
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depends on ARCH_OMAP
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select DMA_ENGINE
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help
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The Communications Port Programming Interface (CPPI) 4.1 DMA engine
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is currently used by the USB driver on AM335x platforms.
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config MMP_PDMA
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bool "MMP PDMA support"
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depends on (ARCH_MMP || ARCH_PXA)
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select DMA_ENGINE
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help
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Support the MMP PDMA engine for PXA and MMP platform.
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config DMA_JZ4740
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tristate "JZ4740 DMA support"
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depends on MACH_JZ4740
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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config K3_DMA
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tristate "Hisilicon K3 DMA support"
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depends on ARCH_HI3xxx
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support the DMA engine for Hisilicon K3 platform
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devices.
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config DMA_ENGINE
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bool
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config DMA_VIRTUAL_CHANNELS
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tristate
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config DMA_ACPI
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def_bool y
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depends on ACPI
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config DMA_OF
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def_bool y
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depends on OF
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comment "DMA Clients"
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depends on DMA_ENGINE
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config NET_DMA
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bool "Network: TCP receive copy offload"
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depends on DMA_ENGINE && NET
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default (INTEL_IOATDMA || FSL_DMA)
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depends on BROKEN
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help
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This enables the use of DMA engines in the network stack to
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offload receive copy-to-user operations, freeing CPU cycles.
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Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
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say N.
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config ASYNC_TX_DMA
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bool "Async_tx: Offload support for the async_tx api"
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depends on DMA_ENGINE
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help
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This allows the async_tx api to take advantage of offload engines for
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memcpy, memset, xor, and raid6 p+q operations. If your platform has
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a dma engine that can perform raid operations and you have enabled
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MD_RAID456 say Y.
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If unsure, say N.
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config DMATEST
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tristate "DMA Test client"
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depends on DMA_ENGINE
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help
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Simple DMA test client. Say N unless you're debugging a
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DMA Device driver.
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config DMA_ENGINE_RAID
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bool
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endif
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