54e269ead6
Patch from Deepak Saxena The expansion bus on the IXP46x NPU can be configured for either 32MiB or 16MiB windows and changing the configuration causes the base address for each chip select for each region to change. Because of this, we cannot hardcode the physical base as we currently do. This patch checks the expansion bus configuration registers at runtime to determine the appropriate window size. Note that this requires that the bootloader already configured the device sizes appropriately, but I feel that is valid assumption to make as the bootloader must configure and access the flash window, the output display (LCD, LEDs, etc) window, and other expansion bus devices. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
117 lines
3.7 KiB
C
117 lines
3.7 KiB
C
/*
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* include/asm-arm/arch-ixp4xx/gtwx5715.h
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*
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* Gemtek GTWX5715 Gateway (Linksys WRV54G)
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*
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* Copyright 2004 (c) George T. Joseph
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#error "Do not include this directly, instead #include <asm/hardware.h>"
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#endif
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#include "irqs.h"
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#define GTWX5715_GPIO0 0
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#define GTWX5715_GPIO1 1
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#define GTWX5715_GPIO2 2
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#define GTWX5715_GPIO3 3
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#define GTWX5715_GPIO4 4
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#define GTWX5715_GPIO5 5
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#define GTWX5715_GPIO6 6
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#define GTWX5715_GPIO7 7
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#define GTWX5715_GPIO8 8
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#define GTWX5715_GPIO9 9
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#define GTWX5715_GPIO10 10
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#define GTWX5715_GPIO11 11
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#define GTWX5715_GPIO12 12
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#define GTWX5715_GPIO13 13
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#define GTWX5715_GPIO14 14
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#define GTWX5715_GPIO0_IRQ IRQ_IXP4XX_GPIO0
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#define GTWX5715_GPIO1_IRQ IRQ_IXP4XX_GPIO1
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#define GTWX5715_GPIO2_IRQ IRQ_IXP4XX_GPIO2
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#define GTWX5715_GPIO3_IRQ IRQ_IXP4XX_GPIO3
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#define GTWX5715_GPIO4_IRQ IRQ_IXP4XX_GPIO4
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#define GTWX5715_GPIO5_IRQ IRQ_IXP4XX_GPIO5
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#define GTWX5715_GPIO6_IRQ IRQ_IXP4XX_GPIO6
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#define GTWX5715_GPIO7_IRQ IRQ_IXP4XX_GPIO7
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#define GTWX5715_GPIO8_IRQ IRQ_IXP4XX_GPIO8
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#define GTWX5715_GPIO9_IRQ IRQ_IXP4XX_GPIO9
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#define GTWX5715_GPIO10_IRQ IRQ_IXP4XX_GPIO10
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#define GTWX5715_GPIO11_IRQ IRQ_IXP4XX_GPIO11
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#define GTWX5715_GPIO12_IRQ IRQ_IXP4XX_GPIO12
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#define GTWX5715_GPIO13_IRQ IRQ_IXP4XX_SW_INT1
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#define GTWX5715_GPIO14_IRQ IRQ_IXP4XX_SW_INT2
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/* PCI controller GPIO to IRQ pin mappings
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INTA INTB
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SLOT 0 10 11
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SLOT 1 11 10
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*/
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#define GTWX5715_PCI_SLOT0_DEVID 0
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#define GTWX5715_PCI_SLOT0_INTA_GPIO GTWX5715_GPIO10
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#define GTWX5715_PCI_SLOT0_INTB_GPIO GTWX5715_GPIO11
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#define GTWX5715_PCI_SLOT0_INTA_IRQ GTWX5715_GPIO10_IRQ
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#define GTWX5715_PCI_SLOT0_INTB_IRQ GTWX5715_GPIO11_IRQ
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#define GTWX5715_PCI_SLOT1_DEVID 1
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#define GTWX5715_PCI_SLOT1_INTA_GPIO GTWX5715_GPIO11
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#define GTWX5715_PCI_SLOT1_INTB_GPIO GTWX5715_GPIO10
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#define GTWX5715_PCI_SLOT1_INTA_IRQ GTWX5715_GPIO11_IRQ
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#define GTWX5715_PCI_SLOT1_INTB_IRQ GTWX5715_GPIO10_IRQ
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#define GTWX5715_PCI_SLOT_COUNT 2
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#define GTWX5715_PCI_INT_PIN_COUNT 2
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/*
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* GPIO 5,6,7 and12 are hard wired to the Kendin KS8995M Switch
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* and operate as an SPI type interface. The details of the interface
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* are available on Kendin/Micrel's web site.
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*/
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#define GTWX5715_KSSPI_SELECT GTWX5715_GPIO5
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#define GTWX5715_KSSPI_TXD GTWX5715_GPIO6
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#define GTWX5715_KSSPI_CLOCK GTWX5715_GPIO7
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#define GTWX5715_KSSPI_RXD GTWX5715_GPIO12
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/*
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* The "reset" button is wired to GPIO 3.
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* The GPIO is brought "low" when the button is pushed.
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*/
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#define GTWX5715_BUTTON_GPIO GTWX5715_GPIO3
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#define GTWX5715_BUTTON_IRQ GTWX5715_GPIO3_IRQ
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/*
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* Board Label Front Label
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* LED1 Power
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* LED2 Wireless-G
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* LED3 not populated but could be
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* LED4 Internet
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* LED5 - LED8 Controlled by KS8995M Switch
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* LED9 DMZ
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*/
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#define GTWX5715_LED1_GPIO GTWX5715_GPIO2
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#define GTWX5715_LED2_GPIO GTWX5715_GPIO9
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#define GTWX5715_LED3_GPIO GTWX5715_GPIO8
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#define GTWX5715_LED4_GPIO GTWX5715_GPIO1
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#define GTWX5715_LED9_GPIO GTWX5715_GPIO4
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