7accbffdb8
The IDE core looks at the wrong bit when checking if the secondary channel is enabled on PCI0646 -- CNTRL register bit 7 is read-ahead disable, bit 3 is the correct one. Starting with PCI0646U chip, the primary channel can also be enabled/disabled -- so, add 'enablebits' initializers to each 'ide_pci_device_t' structure, handling the original PCI0646 via adding the init_setup() method and clearing the 'reg' field there if necessary... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> |
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aec62xx.c | ||
alim15x3.c | ||
amd74xx.c | ||
atiixp.c | ||
cmd64x.c | ||
cmd640.c | ||
cs5520.c | ||
cs5530.c | ||
cs5535.c | ||
cy82c693.c | ||
delkin_cb.c | ||
generic.c | ||
hpt34x.c | ||
hpt366.c | ||
it821x.c | ||
it8213.c | ||
jmicron.c | ||
Makefile | ||
ns87415.c | ||
opti621.c | ||
pdc202xx_new.c | ||
pdc202xx_old.c | ||
piix.c | ||
rz1000.c | ||
sc1200.c | ||
scc_pata.c | ||
serverworks.c | ||
sgiioc4.c | ||
siimage.c | ||
sis5513.c | ||
sl82c105.c | ||
slc90e66.c | ||
tc86c001.c | ||
triflex.c | ||
trm290.c | ||
via82cxxx.c |