Mike Rapoport 782de70c42 mm: consolidate pgtable_cache_init() and pgd_cache_init() ... Both pgtable_cache_init() and pgd_cache_init() are used to initialize kmem cache for page table allocations on several architectures that do not use PAGE_SIZE tables for one or more levels of the page table hierarchy. Most architectures do not implement these functions and use __weak default NOP implementation of pgd_cache_init(). Since there is no such default for pgtable_cache_init(), its empty stub is duplicated among most architectures. Rename the definitions of pgd_cache_init() to pgtable_cache_init() and drop empty stubs of pgtable_cache_init(). Link: http://lkml.kernel.org/r/1566457046-22637-1-git-send-email-rppt@linux.ibm.com Signed-off-by: Mike Rapoport <rppt@linux.ibm.com> Acked-by: Will Deacon <will@kernel.org> [arm64] Acked-by: Thomas Gleixner <tglx@linutronix.de> [x86] Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Matthew Wilcox <willy@infradead.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>		2019-09-24 15:54:09 -07:00
..
boot	riscv: dts: fu540-c000: drop "timebase-frequency"	2019-07-31 12:26:10 -07:00
configs	riscv: defconfig: Update the defconfig	2019-08-13 19:26:42 -07:00
include	mm: consolidate pgtable_cache_init() and pgd_cache_init()	2019-09-24 15:54:09 -07:00
kernel	RISC-V updates for v5.4-rc1	2019-09-16 15:29:34 -07:00
lib	riscv: Using CSR numbers to access CSRs	2019-08-30 11:04:19 -07:00
mm	riscv: move the TLB flush logic out of line	2019-09-05 01:54:51 -07:00
net	bpf, riscv: Enable zext optimization for more RV64G ALU ops	2019-07-05 23:55:41 +02:00
Kbuild	riscv: add arch/riscv/Kbuild	2019-08-30 17:34:00 -07:00
Kconfig	Kbuild updates for v5.4	2019-09-20 08:36:47 -07:00
Kconfig.debug
Kconfig.socs	riscv: select SiFive platform drivers with SOC_SIFIVE	2019-07-01 13:20:01 -07:00
Makefile	Kbuild updates for v5.4	2019-09-20 08:36:47 -07:00