401 lines
9.0 KiB
Plaintext
401 lines
9.0 KiB
Plaintext
/*
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* at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Hong Xu <hong.xu@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91SAM9N12 SoC";
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compatible = "atmel,at91sam9n12";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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serial4 = &usart3;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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memory {
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reg = <0x20000000 0x10000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <3>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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};
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ramc0: ramc@ffffe800 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe800 0x200>;
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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};
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rstc@fffffe00 {
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compatible = "atmel,at91sam9g45-rstc";
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reg = <0xfffffe00 0x10>;
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};
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pit: timer@fffffe30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffe30 0xf>;
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interrupts = <1 4 7>;
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};
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shdwc@fffffe10 {
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compatible = "atmel,at91sam9x5-shdwc";
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reg = <0xfffffe10 0x10>;
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};
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mmc0: mmc@f0008000 {
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compatible = "atmel,hsmci";
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reg = <0xf0008000 0x600>;
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interrupts = <12 4 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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tcb0: timer@f8008000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf8008000 0x100>;
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interrupts = <17 4 0>;
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};
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tcb1: timer@f800c000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf800c000 0x100>;
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interrupts = <17 4 0>;
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};
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dma: dma-controller@ffffec00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffec00 0x200>;
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interrupts = <20 4 0>;
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};
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pinctrl@fffff400 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff400 0xfffff400 0x800>;
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atmel,mux-mask = <
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/* A B C */
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0xffffffff 0xffe07983 0x00000000 /* pioA */
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0x00040000 0x00047e0f 0x00000000 /* pioB */
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0xfdffffff 0x07c00000 0xb83fffff /* pioC */
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0x003fffff 0x003f8000 0x00000000 /* pioD */
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>;
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<0 9 0x1 0x0 /* PA9 periph A */
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0 10 0x1 0x1>; /* PA10 periph with pullup */
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};
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};
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<0 1 0x1 0x1 /* PA1 periph A with pullup */
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0 0 0x1 0x0>; /* PA0 periph A */
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};
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pinctrl_usart0_rts: usart0_rts-0 {
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atmel,pins =
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<0 2 0x1 0x0>; /* PA2 periph A */
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};
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pinctrl_usart0_cts: usart0_cts-0 {
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atmel,pins =
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<0 3 0x1 0x0>; /* PA3 periph A */
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};
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};
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<0 6 0x1 0x1 /* PA6 periph A with pullup */
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0 5 0x1 0x0>; /* PA5 periph A */
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};
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};
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<0 8 0x1 0x1 /* PA8 periph A with pullup */
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0 7 0x1 0x0>; /* PA7 periph A */
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};
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pinctrl_usart2_rts: usart2_rts-0 {
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atmel,pins =
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<1 0 0x2 0x0>; /* PB0 periph B */
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};
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pinctrl_usart2_cts: usart2_cts-0 {
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atmel,pins =
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<1 1 0x2 0x0>; /* PB1 periph B */
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};
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};
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usart3 {
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pinctrl_usart3: usart3-0 {
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atmel,pins =
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<2 23 0x2 0x1 /* PC23 periph B with pullup */
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2 22 0x2 0x0>; /* PC22 periph B */
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};
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pinctrl_usart3_rts: usart3_rts-0 {
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atmel,pins =
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<2 24 0x2 0x0>; /* PC24 periph B */
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};
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pinctrl_usart3_cts: usart3_cts-0 {
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atmel,pins =
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<2 25 0x2 0x0>; /* PC25 periph B */
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};
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};
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<2 9 0x3 0x1 /* PC9 periph C with pullup */
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2 8 0x3 0x0>; /* PC8 periph C */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<2 16 0x3 0x1 /* PC17 periph C with pullup */
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2 17 0x3 0x0>; /* PC16 periph C */
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};
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};
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nand {
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pinctrl_nand: nand-0 {
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atmel,pins =
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<3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/
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3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */
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};
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};
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mmc0 {
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pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
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atmel,pins =
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<0 17 0x1 0x0 /* PA17 periph A */
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0 16 0x1 0x1 /* PA16 periph A with pullup */
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0 15 0x1 0x1>; /* PA15 periph A with pullup */
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};
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pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
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atmel,pins =
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<0 18 0x1 0x1 /* PA18 periph A with pullup */
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0 19 0x1 0x1 /* PA19 periph A with pullup */
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0 20 0x1 0x1>; /* PA20 periph A with pullup */
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};
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pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
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atmel,pins =
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<0 11 0x2 0x1 /* PA11 periph B with pullup */
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0 12 0x2 0x1 /* PA12 periph B with pullup */
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0 13 0x2 0x1 /* PA13 periph B with pullup */
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0 14 0x2 0x1>; /* PA14 periph B with pullup */
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};
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};
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pioA: gpio@fffff400 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioB: gpio@fffff600 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff600 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioC: gpio@fffff800 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffff800 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioD: gpio@fffffa00 {
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compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
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reg = <0xfffffa00 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 4 7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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status = "disabled";
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};
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usart0: serial@f801c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf801c000 0x4000>;
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interrupts = <5 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart0>;
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status = "disabled";
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};
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usart1: serial@f8020000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8020000 0x4000>;
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interrupts = <6 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart1>;
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status = "disabled";
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};
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usart2: serial@f8024000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8024000 0x4000>;
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interrupts = <7 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart2>;
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status = "disabled";
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};
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usart3: serial@f8028000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8028000 0x4000>;
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interrupts = <8 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart3>;
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status = "disabled";
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};
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i2c0: i2c@f8010000 {
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compatible = "atmel,at91sam9x5-i2c";
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reg = <0xf8010000 0x100>;
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interrupts = <9 4 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@f8014000 {
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compatible = "atmel,at91sam9x5-i2c";
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reg = <0xf8014000 0x100>;
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interrupts = <10 4 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = < 0x40000000 0x10000000
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0xffffe000 0x00000600
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0xffffe600 0x00000200
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0x00100000 0x00100000
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>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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gpios = <&pioD 5 0
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&pioD 4 0
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0
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>;
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status = "disabled";
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};
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usb0: ohci@00500000 {
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compatible = "atmel,at91rm9200-ohci", "usb-ohci";
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reg = <0x00500000 0x00100000>;
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interrupts = <22 4 2>;
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status = "disabled";
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};
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};
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i2c@0 {
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compatible = "i2c-gpio";
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gpios = <&pioA 30 0 /* sda */
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&pioA 31 0 /* scl */
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>;
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i2c-gpio,sda-open-drain;
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i2c-gpio,scl-open-drain;
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i2c-gpio,delay-us = <2>; /* ~100 kHz */
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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