e193325e3e
This patch implement GPIO LIB support for the CPM2 GPIOs. The code can also be used for CPM1 GPIO port E, as both cores are compatible at the register level. Based on earlier work by Laurent Pinchart. Signed-off-by: Jochen Friedrich <jochen@scram.de> Cc: Laurent Pinchart <laurentp@cse-semaphore.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
107 lines
3.5 KiB
C
107 lines
3.5 KiB
C
#ifndef __CPM_H
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#define __CPM_H
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <linux/of.h>
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/* Opcodes common to CPM1 and CPM2
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*/
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#define CPM_CR_INIT_TRX ((ushort)0x0000)
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#define CPM_CR_INIT_RX ((ushort)0x0001)
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#define CPM_CR_INIT_TX ((ushort)0x0002)
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#define CPM_CR_HUNT_MODE ((ushort)0x0003)
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#define CPM_CR_STOP_TX ((ushort)0x0004)
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#define CPM_CR_GRA_STOP_TX ((ushort)0x0005)
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#define CPM_CR_RESTART_TX ((ushort)0x0006)
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#define CPM_CR_CLOSE_RX_BD ((ushort)0x0007)
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#define CPM_CR_SET_GADDR ((ushort)0x0008)
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#define CPM_CR_SET_TIMER ((ushort)0x0008)
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#define CPM_CR_STOP_IDMA ((ushort)0x000b)
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/* Buffer descriptors used by many of the CPM protocols. */
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typedef struct cpm_buf_desc {
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ushort cbd_sc; /* Status and Control */
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ushort cbd_datlen; /* Data length in buffer */
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uint cbd_bufaddr; /* Buffer address in host memory */
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} cbd_t;
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/* Buffer descriptor control/status used by serial
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*/
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#define BD_SC_EMPTY (0x8000) /* Receive is empty */
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#define BD_SC_READY (0x8000) /* Transmit is ready */
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#define BD_SC_WRAP (0x2000) /* Last buffer descriptor */
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#define BD_SC_INTRPT (0x1000) /* Interrupt on change */
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#define BD_SC_LAST (0x0800) /* Last buffer in frame */
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#define BD_SC_TC (0x0400) /* Transmit CRC */
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#define BD_SC_CM (0x0200) /* Continous mode */
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#define BD_SC_ID (0x0100) /* Rec'd too many idles */
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#define BD_SC_P (0x0100) /* xmt preamble */
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#define BD_SC_BR (0x0020) /* Break received */
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#define BD_SC_FR (0x0010) /* Framing error */
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#define BD_SC_PR (0x0008) /* Parity error */
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#define BD_SC_NAK (0x0004) /* NAK - did not respond */
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#define BD_SC_OV (0x0002) /* Overrun */
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#define BD_SC_UN (0x0002) /* Underrun */
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#define BD_SC_CD (0x0001) /* */
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#define BD_SC_CL (0x0001) /* Collision */
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/* Buffer descriptor control/status used by Ethernet receive.
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* Common to SCC and FCC.
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*/
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#define BD_ENET_RX_EMPTY (0x8000)
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#define BD_ENET_RX_WRAP (0x2000)
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#define BD_ENET_RX_INTR (0x1000)
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#define BD_ENET_RX_LAST (0x0800)
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#define BD_ENET_RX_FIRST (0x0400)
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#define BD_ENET_RX_MISS (0x0100)
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#define BD_ENET_RX_BC (0x0080) /* FCC Only */
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#define BD_ENET_RX_MC (0x0040) /* FCC Only */
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#define BD_ENET_RX_LG (0x0020)
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#define BD_ENET_RX_NO (0x0010)
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#define BD_ENET_RX_SH (0x0008)
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#define BD_ENET_RX_CR (0x0004)
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#define BD_ENET_RX_OV (0x0002)
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#define BD_ENET_RX_CL (0x0001)
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#define BD_ENET_RX_STATS (0x01ff) /* All status bits */
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/* Buffer descriptor control/status used by Ethernet transmit.
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* Common to SCC and FCC.
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*/
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#define BD_ENET_TX_READY (0x8000)
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#define BD_ENET_TX_PAD (0x4000)
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#define BD_ENET_TX_WRAP (0x2000)
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#define BD_ENET_TX_INTR (0x1000)
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#define BD_ENET_TX_LAST (0x0800)
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#define BD_ENET_TX_TC (0x0400)
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#define BD_ENET_TX_DEF (0x0200)
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#define BD_ENET_TX_HB (0x0100)
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#define BD_ENET_TX_LC (0x0080)
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#define BD_ENET_TX_RL (0x0040)
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#define BD_ENET_TX_RCMASK (0x003c)
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#define BD_ENET_TX_UN (0x0002)
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#define BD_ENET_TX_CSL (0x0001)
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#define BD_ENET_TX_STATS (0x03ff) /* All status bits */
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/* Buffer descriptor control/status used by Transparent mode SCC.
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*/
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#define BD_SCC_TX_LAST (0x0800)
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/* Buffer descriptor control/status used by I2C.
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*/
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#define BD_I2C_START (0x0400)
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int cpm_muram_init(void);
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unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
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int cpm_muram_free(unsigned long offset);
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unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
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void __iomem *cpm_muram_addr(unsigned long offset);
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unsigned long cpm_muram_offset(void __iomem *addr);
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dma_addr_t cpm_muram_dma(void __iomem *addr);
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int cpm_command(u32 command, u8 opcode);
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int cpm2_gpiochip_add32(struct device_node *np);
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#endif
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