3e11f7b840
It fixes the issue in gpio-generic that commit fb14921 (gpio/mxc: add
missing initialization of basic_mmio_gpio shadow variables) manged to
fix in gpio-mxc driver, so that other platform specific drivers do not
suffer from the same problem over and over again.
Changes since v1:
* Turn the last parameter of bgpio_init() "bool big_endian" into
"unsigned long flags" and give those really quirky hardwares a
chance to tell that reg_set and reg_dir are unreadable.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
[grant.likely: Fix big-endian usage to explicitly set BBGPIOF_BIG_ENDIAN]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
77 lines
2.0 KiB
C
77 lines
2.0 KiB
C
/*
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* Basic memory-mapped GPIO controllers.
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*
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* Copyright 2008 MontaVista Software, Inc.
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* Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __BASIC_MMIO_GPIO_H
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#define __BASIC_MMIO_GPIO_H
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#include <linux/gpio.h>
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#include <linux/types.h>
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#include <linux/compiler.h>
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#include <linux/spinlock_types.h>
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struct bgpio_pdata {
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int base;
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int ngpio;
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};
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struct device;
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struct bgpio_chip {
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struct gpio_chip gc;
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unsigned long (*read_reg)(void __iomem *reg);
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void (*write_reg)(void __iomem *reg, unsigned long data);
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void __iomem *reg_dat;
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void __iomem *reg_set;
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void __iomem *reg_clr;
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void __iomem *reg_dir;
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/* Number of bits (GPIOs): <register width> * 8. */
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int bits;
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/*
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* Some GPIO controllers work with the big-endian bits notation,
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* e.g. in a 8-bits register, GPIO7 is the least significant bit.
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*/
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unsigned long (*pin2mask)(struct bgpio_chip *bgc, unsigned int pin);
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/*
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* Used to lock bgpio_chip->data. Also, this is needed to keep
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* shadowed and real data registers writes together.
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*/
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spinlock_t lock;
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/* Shadowed data register to clear/set bits safely. */
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unsigned long data;
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/* Shadowed direction registers to clear/set direction safely. */
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unsigned long dir;
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};
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static inline struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc)
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{
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return container_of(gc, struct bgpio_chip, gc);
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}
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int bgpio_remove(struct bgpio_chip *bgc);
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int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
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unsigned long sz, void __iomem *dat, void __iomem *set,
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void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
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unsigned long flags);
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#define BGPIOF_BIG_ENDIAN BIT(0)
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#define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */
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#define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */
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#endif /* __BASIC_MMIO_GPIO_H */
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