f6ed1b3b35
The octeon-ethernet driver shares an mdio bus with the octeon-mgmt driver. Here we convert the octeon-ethernet driver to use the PHY Abstraction Layer. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
890 lines
27 KiB
C
890 lines
27 KiB
C
/**********************************************************************
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* Author: Cavium Networks
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*
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (c) 2003-2007 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful, but
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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* NONINFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this file; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* or visit http://www.gnu.org/licenses/.
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*
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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**********************************************************************/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/delay.h>
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#include <linux/phy.h>
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#include <net/dst.h>
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#include <asm/octeon/octeon.h>
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#include "ethernet-defines.h"
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#include "octeon-ethernet.h"
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#include "ethernet-mem.h"
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#include "ethernet-rx.h"
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#include "ethernet-tx.h"
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#include "ethernet-mdio.h"
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#include "ethernet-util.h"
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#include "ethernet-proc.h"
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#include "cvmx-pip.h"
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#include "cvmx-pko.h"
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#include "cvmx-fau.h"
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#include "cvmx-ipd.h"
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#include "cvmx-helper.h"
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#include "cvmx-gmxx-defs.h"
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#include "cvmx-smix-defs.h"
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#if defined(CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS) \
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&& CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS
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int num_packet_buffers = CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS;
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#else
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int num_packet_buffers = 1024;
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#endif
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module_param(num_packet_buffers, int, 0444);
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MODULE_PARM_DESC(num_packet_buffers, "\n"
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"\tNumber of packet buffers to allocate and store in the\n"
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"\tFPA. By default, 1024 packet buffers are used unless\n"
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"\tCONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS is defined.");
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int pow_receive_group = 15;
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module_param(pow_receive_group, int, 0444);
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MODULE_PARM_DESC(pow_receive_group, "\n"
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"\tPOW group to receive packets from. All ethernet hardware\n"
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"\twill be configured to send incomming packets to this POW\n"
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"\tgroup. Also any other software can submit packets to this\n"
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"\tgroup for the kernel to process.");
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int pow_send_group = -1;
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module_param(pow_send_group, int, 0644);
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MODULE_PARM_DESC(pow_send_group, "\n"
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"\tPOW group to send packets to other software on. This\n"
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"\tcontrols the creation of the virtual device pow0.\n"
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"\talways_use_pow also depends on this value.");
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int always_use_pow;
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module_param(always_use_pow, int, 0444);
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MODULE_PARM_DESC(always_use_pow, "\n"
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"\tWhen set, always send to the pow group. This will cause\n"
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"\tpackets sent to real ethernet devices to be sent to the\n"
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"\tPOW group instead of the hardware. Unless some other\n"
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"\tapplication changes the config, packets will still be\n"
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"\treceived from the low level hardware. Use this option\n"
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"\tto allow a CVMX app to intercept all packets from the\n"
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"\tlinux kernel. You must specify pow_send_group along with\n"
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"\tthis option.");
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char pow_send_list[128] = "";
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module_param_string(pow_send_list, pow_send_list, sizeof(pow_send_list), 0444);
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MODULE_PARM_DESC(pow_send_list, "\n"
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"\tComma separated list of ethernet devices that should use the\n"
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"\tPOW for transmit instead of the actual ethernet hardware. This\n"
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"\tis a per port version of always_use_pow. always_use_pow takes\n"
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"\tprecedence over this list. For example, setting this to\n"
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"\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n"
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"\tusing the pow_send_group.");
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static int disable_core_queueing = 1;
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module_param(disable_core_queueing, int, 0444);
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MODULE_PARM_DESC(disable_core_queueing, "\n"
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"\tWhen set the networking core's tx_queue_len is set to zero. This\n"
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"\tallows packets to be sent without lock contention in the packet\n"
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"\tscheduler resulting in some cases in improved throughput.\n");
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/*
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* The offset from mac_addr_base that should be used for the next port
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* that is configured. By convention, if any mgmt ports exist on the
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* chip, they get the first mac addresses, The ports controlled by
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* this driver are numbered sequencially following any mgmt addresses
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* that may exist.
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*/
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static unsigned int cvm_oct_mac_addr_offset;
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/**
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* Periodic timer to check auto negotiation
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*/
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static struct timer_list cvm_oct_poll_timer;
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/**
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* Array of every ethernet device owned by this driver indexed by
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* the ipd input port number.
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*/
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struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS];
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/**
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* Periodic timer tick for slow management operations
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*
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* @arg: Device to check
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*/
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static void cvm_do_timer(unsigned long arg)
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{
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int32_t skb_to_free, undo;
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int queues_per_port;
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int qos;
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struct octeon_ethernet *priv;
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static int port;
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if (port >= CVMX_PIP_NUM_INPUT_PORTS) {
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/*
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* All ports have been polled. Start the next
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* iteration through the ports in one second.
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*/
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port = 0;
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mod_timer(&cvm_oct_poll_timer, jiffies + HZ);
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return;
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}
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if (!cvm_oct_device[port])
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goto out;
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priv = netdev_priv(cvm_oct_device[port]);
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if (priv->poll)
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priv->poll(cvm_oct_device[port]);
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queues_per_port = cvmx_pko_get_num_queues(port);
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/* Drain any pending packets in the free list */
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for (qos = 0; qos < queues_per_port; qos++) {
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if (skb_queue_len(&priv->tx_free_list[qos]) == 0)
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continue;
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skb_to_free = cvmx_fau_fetch_and_add32(priv->fau + qos * 4,
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MAX_SKB_TO_FREE);
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undo = skb_to_free > 0 ?
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MAX_SKB_TO_FREE : skb_to_free + MAX_SKB_TO_FREE;
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if (undo > 0)
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cvmx_fau_atomic_add32(priv->fau+qos*4, -undo);
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skb_to_free = -skb_to_free > MAX_SKB_TO_FREE ?
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MAX_SKB_TO_FREE : -skb_to_free;
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cvm_oct_free_tx_skbs(priv, skb_to_free, qos, 1);
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}
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cvm_oct_device[port]->netdev_ops->ndo_get_stats(cvm_oct_device[port]);
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out:
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port++;
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/* Poll the next port in a 50th of a second.
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This spreads the polling of ports out a little bit */
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mod_timer(&cvm_oct_poll_timer, jiffies + HZ / 50);
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}
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/**
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* Configure common hardware for all interfaces
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*/
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static __init void cvm_oct_configure_common_hw(void)
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{
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int r;
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/* Setup the FPA */
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cvmx_fpa_enable();
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cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
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num_packet_buffers);
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cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
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num_packet_buffers);
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if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
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cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
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CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128);
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if (USE_RED)
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cvmx_helper_setup_red(num_packet_buffers / 4,
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num_packet_buffers / 8);
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/* Enable the MII interface */
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if (!octeon_is_simulation())
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cvmx_write_csr(CVMX_SMIX_EN(0), 1);
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/* Register an IRQ hander for to receive POW interrupts */
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r = request_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group,
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cvm_oct_do_interrupt, IRQF_SHARED, "Ethernet",
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cvm_oct_device);
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#if defined(CONFIG_SMP) && 0
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if (USE_MULTICORE_RECEIVE) {
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irq_set_affinity(OCTEON_IRQ_WORKQ0 + pow_receive_group,
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cpu_online_mask);
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}
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#endif
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}
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/**
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* Free a work queue entry received in a intercept callback.
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*
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* @work_queue_entry:
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* Work queue entry to free
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* Returns Zero on success, Negative on failure.
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*/
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int cvm_oct_free_work(void *work_queue_entry)
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{
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cvmx_wqe_t *work = work_queue_entry;
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int segments = work->word2.s.bufs;
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union cvmx_buf_ptr segment_ptr = work->packet_ptr;
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while (segments--) {
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union cvmx_buf_ptr next_ptr = *(union cvmx_buf_ptr *)
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cvmx_phys_to_ptr(segment_ptr.s.addr - 8);
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if (unlikely(!segment_ptr.s.i))
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cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr),
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segment_ptr.s.pool,
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DONT_WRITEBACK(CVMX_FPA_PACKET_POOL_SIZE /
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128));
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segment_ptr = next_ptr;
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}
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cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, DONT_WRITEBACK(1));
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return 0;
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}
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EXPORT_SYMBOL(cvm_oct_free_work);
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/**
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* Get the low level ethernet statistics
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*
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* @dev: Device to get the statistics from
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* Returns Pointer to the statistics
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*/
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static struct net_device_stats *cvm_oct_common_get_stats(struct net_device *dev)
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{
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cvmx_pip_port_status_t rx_status;
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cvmx_pko_port_status_t tx_status;
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struct octeon_ethernet *priv = netdev_priv(dev);
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if (priv->port < CVMX_PIP_NUM_INPUT_PORTS) {
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if (octeon_is_simulation()) {
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/* The simulator doesn't support statistics */
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memset(&rx_status, 0, sizeof(rx_status));
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memset(&tx_status, 0, sizeof(tx_status));
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} else {
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cvmx_pip_get_port_status(priv->port, 1, &rx_status);
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cvmx_pko_get_port_status(priv->port, 1, &tx_status);
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}
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priv->stats.rx_packets += rx_status.inb_packets;
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priv->stats.tx_packets += tx_status.packets;
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priv->stats.rx_bytes += rx_status.inb_octets;
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priv->stats.tx_bytes += tx_status.octets;
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priv->stats.multicast += rx_status.multicast_packets;
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priv->stats.rx_crc_errors += rx_status.inb_errors;
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priv->stats.rx_frame_errors += rx_status.fcs_align_err_packets;
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/*
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* The drop counter must be incremented atomically
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* since the RX tasklet also increments it.
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*/
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#ifdef CONFIG_64BIT
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atomic64_add(rx_status.dropped_packets,
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(atomic64_t *)&priv->stats.rx_dropped);
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#else
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atomic_add(rx_status.dropped_packets,
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(atomic_t *)&priv->stats.rx_dropped);
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#endif
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}
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return &priv->stats;
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}
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/**
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* Change the link MTU. Unimplemented
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*
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* @dev: Device to change
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* @new_mtu: The new MTU
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*
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* Returns Zero on success
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*/
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static int cvm_oct_common_change_mtu(struct net_device *dev, int new_mtu)
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{
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struct octeon_ethernet *priv = netdev_priv(dev);
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int interface = INTERFACE(priv->port);
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int index = INDEX(priv->port);
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#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
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int vlan_bytes = 4;
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#else
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int vlan_bytes = 0;
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#endif
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/*
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* Limit the MTU to make sure the ethernet packets are between
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* 64 bytes and 65535 bytes.
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*/
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if ((new_mtu + 14 + 4 + vlan_bytes < 64)
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|| (new_mtu + 14 + 4 + vlan_bytes > 65392)) {
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pr_err("MTU must be between %d and %d.\n",
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64 - 14 - 4 - vlan_bytes, 65392 - 14 - 4 - vlan_bytes);
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return -EINVAL;
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}
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dev->mtu = new_mtu;
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if ((interface < 2)
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&& (cvmx_helper_interface_get_mode(interface) !=
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CVMX_HELPER_INTERFACE_MODE_SPI)) {
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/* Add ethernet header and FCS, and VLAN if configured. */
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int max_packet = new_mtu + 14 + 4 + vlan_bytes;
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX)
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|| OCTEON_IS_MODEL(OCTEON_CN58XX)) {
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/* Signal errors on packets larger than the MTU */
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cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface),
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max_packet);
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} else {
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/*
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* Set the hardware to truncate packets larger
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* than the MTU and smaller the 64 bytes.
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*/
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union cvmx_pip_frm_len_chkx frm_len_chk;
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frm_len_chk.u64 = 0;
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frm_len_chk.s.minlen = 64;
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frm_len_chk.s.maxlen = max_packet;
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cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface),
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frm_len_chk.u64);
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}
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/*
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* Set the hardware to truncate packets larger than
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* the MTU. The jabber register must be set to a
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* multiple of 8 bytes, so round up.
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*/
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cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface),
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(max_packet + 7) & ~7u);
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}
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return 0;
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}
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/**
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* Set the multicast list. Currently unimplemented.
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*
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* @dev: Device to work on
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*/
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static void cvm_oct_common_set_multicast_list(struct net_device *dev)
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{
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union cvmx_gmxx_prtx_cfg gmx_cfg;
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struct octeon_ethernet *priv = netdev_priv(dev);
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int interface = INTERFACE(priv->port);
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int index = INDEX(priv->port);
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if ((interface < 2)
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&& (cvmx_helper_interface_get_mode(interface) !=
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CVMX_HELPER_INTERFACE_MODE_SPI)) {
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union cvmx_gmxx_rxx_adr_ctl control;
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control.u64 = 0;
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control.s.bcst = 1; /* Allow broadcast MAC addresses */
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if (dev->mc_list || (dev->flags & IFF_ALLMULTI) ||
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(dev->flags & IFF_PROMISC))
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/* Force accept multicast packets */
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control.s.mcst = 2;
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else
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/* Force reject multicat packets */
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control.s.mcst = 1;
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if (dev->flags & IFF_PROMISC)
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/*
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* Reject matches if promisc. Since CAM is
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* shut off, should accept everything.
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*/
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control.s.cam_mode = 0;
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else
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/* Filter packets based on the CAM */
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control.s.cam_mode = 1;
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gmx_cfg.u64 =
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cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
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cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
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gmx_cfg.u64 & ~1ull);
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cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface),
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control.u64);
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if (dev->flags & IFF_PROMISC)
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cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN
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(index, interface), 0);
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else
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cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN
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(index, interface), 1);
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cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
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gmx_cfg.u64);
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}
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}
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/**
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* Set the hardware MAC address for a device
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*
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* @dev: Device to change the MAC address for
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* @addr: Address structure to change it too. MAC address is addr + 2.
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* Returns Zero on success
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*/
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static int cvm_oct_common_set_mac_address(struct net_device *dev, void *addr)
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{
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struct octeon_ethernet *priv = netdev_priv(dev);
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union cvmx_gmxx_prtx_cfg gmx_cfg;
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int interface = INTERFACE(priv->port);
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int index = INDEX(priv->port);
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memcpy(dev->dev_addr, addr + 2, 6);
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if ((interface < 2)
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&& (cvmx_helper_interface_get_mode(interface) !=
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CVMX_HELPER_INTERFACE_MODE_SPI)) {
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int i;
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uint8_t *ptr = addr;
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uint64_t mac = 0;
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for (i = 0; i < 6; i++)
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mac = (mac << 8) | (uint64_t) (ptr[i + 2]);
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gmx_cfg.u64 =
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cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
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cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
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gmx_cfg.u64 & ~1ull);
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cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac);
|
|
cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface),
|
|
ptr[2]);
|
|
cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface),
|
|
ptr[3]);
|
|
cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface),
|
|
ptr[4]);
|
|
cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface),
|
|
ptr[5]);
|
|
cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface),
|
|
ptr[6]);
|
|
cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface),
|
|
ptr[7]);
|
|
cvm_oct_common_set_multicast_list(dev);
|
|
cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
|
|
gmx_cfg.u64);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* Per network device initialization
|
|
*
|
|
* @dev: Device to initialize
|
|
* Returns Zero on success
|
|
*/
|
|
int cvm_oct_common_init(struct net_device *dev)
|
|
{
|
|
struct octeon_ethernet *priv = netdev_priv(dev);
|
|
struct sockaddr sa;
|
|
u64 mac = ((u64)(octeon_bootinfo->mac_addr_base[0] & 0xff) << 40) |
|
|
((u64)(octeon_bootinfo->mac_addr_base[1] & 0xff) << 32) |
|
|
((u64)(octeon_bootinfo->mac_addr_base[2] & 0xff) << 24) |
|
|
((u64)(octeon_bootinfo->mac_addr_base[3] & 0xff) << 16) |
|
|
((u64)(octeon_bootinfo->mac_addr_base[4] & 0xff) << 8) |
|
|
(u64)(octeon_bootinfo->mac_addr_base[5] & 0xff);
|
|
|
|
mac += cvm_oct_mac_addr_offset;
|
|
sa.sa_data[0] = (mac >> 40) & 0xff;
|
|
sa.sa_data[1] = (mac >> 32) & 0xff;
|
|
sa.sa_data[2] = (mac >> 24) & 0xff;
|
|
sa.sa_data[3] = (mac >> 16) & 0xff;
|
|
sa.sa_data[4] = (mac >> 8) & 0xff;
|
|
sa.sa_data[5] = mac & 0xff;
|
|
|
|
if (cvm_oct_mac_addr_offset >= octeon_bootinfo->mac_addr_count)
|
|
printk(KERN_DEBUG "%s: Using MAC outside of the assigned range:"
|
|
" %02x:%02x:%02x:%02x:%02x:%02x\n", dev->name,
|
|
sa.sa_data[0] & 0xff, sa.sa_data[1] & 0xff,
|
|
sa.sa_data[2] & 0xff, sa.sa_data[3] & 0xff,
|
|
sa.sa_data[4] & 0xff, sa.sa_data[5] & 0xff);
|
|
cvm_oct_mac_addr_offset++;
|
|
|
|
/*
|
|
* Force the interface to use the POW send if always_use_pow
|
|
* was specified or it is in the pow send list.
|
|
*/
|
|
if ((pow_send_group != -1)
|
|
&& (always_use_pow || strstr(pow_send_list, dev->name)))
|
|
priv->queue = -1;
|
|
|
|
if (priv->queue != -1 && USE_HW_TCPUDP_CHECKSUM)
|
|
dev->features |= NETIF_F_IP_CSUM;
|
|
|
|
/* We do our own locking, Linux doesn't need to */
|
|
dev->features |= NETIF_F_LLTX;
|
|
SET_ETHTOOL_OPS(dev, &cvm_oct_ethtool_ops);
|
|
|
|
cvm_oct_phy_setup_device(dev);
|
|
dev->netdev_ops->ndo_set_mac_address(dev, &sa);
|
|
dev->netdev_ops->ndo_change_mtu(dev, dev->mtu);
|
|
|
|
/*
|
|
* Zero out stats for port so we won't mistakenly show
|
|
* counters from the bootloader.
|
|
*/
|
|
memset(dev->netdev_ops->ndo_get_stats(dev), 0,
|
|
sizeof(struct net_device_stats));
|
|
|
|
return 0;
|
|
}
|
|
|
|
void cvm_oct_common_uninit(struct net_device *dev)
|
|
{
|
|
struct octeon_ethernet *priv = netdev_priv(dev);
|
|
|
|
if (priv->phydev)
|
|
phy_disconnect(priv->phydev);
|
|
}
|
|
|
|
static const struct net_device_ops cvm_oct_npi_netdev_ops = {
|
|
.ndo_init = cvm_oct_common_init,
|
|
.ndo_uninit = cvm_oct_common_uninit,
|
|
.ndo_start_xmit = cvm_oct_xmit,
|
|
.ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
|
|
.ndo_set_mac_address = cvm_oct_common_set_mac_address,
|
|
.ndo_do_ioctl = cvm_oct_ioctl,
|
|
.ndo_change_mtu = cvm_oct_common_change_mtu,
|
|
.ndo_get_stats = cvm_oct_common_get_stats,
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
.ndo_poll_controller = cvm_oct_poll_controller,
|
|
#endif
|
|
};
|
|
static const struct net_device_ops cvm_oct_xaui_netdev_ops = {
|
|
.ndo_init = cvm_oct_xaui_init,
|
|
.ndo_uninit = cvm_oct_xaui_uninit,
|
|
.ndo_open = cvm_oct_xaui_open,
|
|
.ndo_stop = cvm_oct_xaui_stop,
|
|
.ndo_start_xmit = cvm_oct_xmit,
|
|
.ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
|
|
.ndo_set_mac_address = cvm_oct_common_set_mac_address,
|
|
.ndo_do_ioctl = cvm_oct_ioctl,
|
|
.ndo_change_mtu = cvm_oct_common_change_mtu,
|
|
.ndo_get_stats = cvm_oct_common_get_stats,
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
.ndo_poll_controller = cvm_oct_poll_controller,
|
|
#endif
|
|
};
|
|
static const struct net_device_ops cvm_oct_sgmii_netdev_ops = {
|
|
.ndo_init = cvm_oct_sgmii_init,
|
|
.ndo_uninit = cvm_oct_sgmii_uninit,
|
|
.ndo_open = cvm_oct_sgmii_open,
|
|
.ndo_stop = cvm_oct_sgmii_stop,
|
|
.ndo_start_xmit = cvm_oct_xmit,
|
|
.ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
|
|
.ndo_set_mac_address = cvm_oct_common_set_mac_address,
|
|
.ndo_do_ioctl = cvm_oct_ioctl,
|
|
.ndo_change_mtu = cvm_oct_common_change_mtu,
|
|
.ndo_get_stats = cvm_oct_common_get_stats,
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
.ndo_poll_controller = cvm_oct_poll_controller,
|
|
#endif
|
|
};
|
|
static const struct net_device_ops cvm_oct_spi_netdev_ops = {
|
|
.ndo_init = cvm_oct_spi_init,
|
|
.ndo_uninit = cvm_oct_spi_uninit,
|
|
.ndo_start_xmit = cvm_oct_xmit,
|
|
.ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
|
|
.ndo_set_mac_address = cvm_oct_common_set_mac_address,
|
|
.ndo_do_ioctl = cvm_oct_ioctl,
|
|
.ndo_change_mtu = cvm_oct_common_change_mtu,
|
|
.ndo_get_stats = cvm_oct_common_get_stats,
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
.ndo_poll_controller = cvm_oct_poll_controller,
|
|
#endif
|
|
};
|
|
static const struct net_device_ops cvm_oct_rgmii_netdev_ops = {
|
|
.ndo_init = cvm_oct_rgmii_init,
|
|
.ndo_uninit = cvm_oct_rgmii_uninit,
|
|
.ndo_open = cvm_oct_rgmii_open,
|
|
.ndo_stop = cvm_oct_rgmii_stop,
|
|
.ndo_start_xmit = cvm_oct_xmit,
|
|
.ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
|
|
.ndo_set_mac_address = cvm_oct_common_set_mac_address,
|
|
.ndo_do_ioctl = cvm_oct_ioctl,
|
|
.ndo_change_mtu = cvm_oct_common_change_mtu,
|
|
.ndo_get_stats = cvm_oct_common_get_stats,
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
.ndo_poll_controller = cvm_oct_poll_controller,
|
|
#endif
|
|
};
|
|
static const struct net_device_ops cvm_oct_pow_netdev_ops = {
|
|
.ndo_init = cvm_oct_common_init,
|
|
.ndo_start_xmit = cvm_oct_xmit_pow,
|
|
.ndo_set_multicast_list = cvm_oct_common_set_multicast_list,
|
|
.ndo_set_mac_address = cvm_oct_common_set_mac_address,
|
|
.ndo_do_ioctl = cvm_oct_ioctl,
|
|
.ndo_change_mtu = cvm_oct_common_change_mtu,
|
|
.ndo_get_stats = cvm_oct_common_get_stats,
|
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
.ndo_poll_controller = cvm_oct_poll_controller,
|
|
#endif
|
|
};
|
|
|
|
extern void octeon_mdiobus_force_mod_depencency(void);
|
|
|
|
/**
|
|
* Module/ driver initialization. Creates the linux network
|
|
* devices.
|
|
*
|
|
* Returns Zero on success
|
|
*/
|
|
static int __init cvm_oct_init_module(void)
|
|
{
|
|
int num_interfaces;
|
|
int interface;
|
|
int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
|
|
int qos;
|
|
|
|
octeon_mdiobus_force_mod_depencency();
|
|
pr_notice("cavium-ethernet %s\n", OCTEON_ETHERNET_VERSION);
|
|
|
|
if (OCTEON_IS_MODEL(OCTEON_CN52XX))
|
|
cvm_oct_mac_addr_offset = 2; /* First two are the mgmt ports. */
|
|
else if (OCTEON_IS_MODEL(OCTEON_CN56XX))
|
|
cvm_oct_mac_addr_offset = 1; /* First one is the mgmt port. */
|
|
else
|
|
cvm_oct_mac_addr_offset = 0;
|
|
|
|
cvm_oct_proc_initialize();
|
|
cvm_oct_rx_initialize();
|
|
cvm_oct_configure_common_hw();
|
|
|
|
cvmx_helper_initialize_packet_io_global();
|
|
|
|
/* Change the input group for all ports before input is enabled */
|
|
num_interfaces = cvmx_helper_get_number_of_interfaces();
|
|
for (interface = 0; interface < num_interfaces; interface++) {
|
|
int num_ports = cvmx_helper_ports_on_interface(interface);
|
|
int port;
|
|
|
|
for (port = cvmx_helper_get_ipd_port(interface, 0);
|
|
port < cvmx_helper_get_ipd_port(interface, num_ports);
|
|
port++) {
|
|
union cvmx_pip_prt_tagx pip_prt_tagx;
|
|
pip_prt_tagx.u64 =
|
|
cvmx_read_csr(CVMX_PIP_PRT_TAGX(port));
|
|
pip_prt_tagx.s.grp = pow_receive_group;
|
|
cvmx_write_csr(CVMX_PIP_PRT_TAGX(port),
|
|
pip_prt_tagx.u64);
|
|
}
|
|
}
|
|
|
|
cvmx_helper_ipd_and_packet_input_enable();
|
|
|
|
memset(cvm_oct_device, 0, sizeof(cvm_oct_device));
|
|
|
|
/*
|
|
* Initialize the FAU used for counting packet buffers that
|
|
* need to be freed.
|
|
*/
|
|
cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0);
|
|
|
|
if ((pow_send_group != -1)) {
|
|
struct net_device *dev;
|
|
pr_info("\tConfiguring device for POW only access\n");
|
|
dev = alloc_etherdev(sizeof(struct octeon_ethernet));
|
|
if (dev) {
|
|
/* Initialize the device private structure. */
|
|
struct octeon_ethernet *priv = netdev_priv(dev);
|
|
memset(priv, 0, sizeof(struct octeon_ethernet));
|
|
|
|
dev->netdev_ops = &cvm_oct_pow_netdev_ops;
|
|
priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
|
priv->port = CVMX_PIP_NUM_INPUT_PORTS;
|
|
priv->queue = -1;
|
|
strcpy(dev->name, "pow%d");
|
|
for (qos = 0; qos < 16; qos++)
|
|
skb_queue_head_init(&priv->tx_free_list[qos]);
|
|
|
|
if (register_netdev(dev) < 0) {
|
|
pr_err("Failed to register ethernet "
|
|
"device for POW\n");
|
|
kfree(dev);
|
|
} else {
|
|
cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev;
|
|
pr_info("%s: POW send group %d, receive "
|
|
"group %d\n",
|
|
dev->name, pow_send_group,
|
|
pow_receive_group);
|
|
}
|
|
} else {
|
|
pr_err("Failed to allocate ethernet device "
|
|
"for POW\n");
|
|
}
|
|
}
|
|
|
|
num_interfaces = cvmx_helper_get_number_of_interfaces();
|
|
for (interface = 0; interface < num_interfaces; interface++) {
|
|
cvmx_helper_interface_mode_t imode =
|
|
cvmx_helper_interface_get_mode(interface);
|
|
int num_ports = cvmx_helper_ports_on_interface(interface);
|
|
int port;
|
|
|
|
for (port = cvmx_helper_get_ipd_port(interface, 0);
|
|
port < cvmx_helper_get_ipd_port(interface, num_ports);
|
|
port++) {
|
|
struct octeon_ethernet *priv;
|
|
struct net_device *dev =
|
|
alloc_etherdev(sizeof(struct octeon_ethernet));
|
|
if (!dev) {
|
|
pr_err("Failed to allocate ethernet device "
|
|
"for port %d\n", port);
|
|
continue;
|
|
}
|
|
if (disable_core_queueing)
|
|
dev->tx_queue_len = 0;
|
|
|
|
/* Initialize the device private structure. */
|
|
priv = netdev_priv(dev);
|
|
memset(priv, 0, sizeof(struct octeon_ethernet));
|
|
|
|
priv->imode = imode;
|
|
priv->port = port;
|
|
priv->queue = cvmx_pko_get_base_queue(priv->port);
|
|
priv->fau = fau - cvmx_pko_get_num_queues(port) * 4;
|
|
for (qos = 0; qos < 16; qos++)
|
|
skb_queue_head_init(&priv->tx_free_list[qos]);
|
|
for (qos = 0; qos < cvmx_pko_get_num_queues(port);
|
|
qos++)
|
|
cvmx_fau_atomic_write32(priv->fau + qos * 4, 0);
|
|
|
|
switch (priv->imode) {
|
|
|
|
/* These types don't support ports to IPD/PKO */
|
|
case CVMX_HELPER_INTERFACE_MODE_DISABLED:
|
|
case CVMX_HELPER_INTERFACE_MODE_PCIE:
|
|
case CVMX_HELPER_INTERFACE_MODE_PICMG:
|
|
break;
|
|
|
|
case CVMX_HELPER_INTERFACE_MODE_NPI:
|
|
dev->netdev_ops = &cvm_oct_npi_netdev_ops;
|
|
strcpy(dev->name, "npi%d");
|
|
break;
|
|
|
|
case CVMX_HELPER_INTERFACE_MODE_XAUI:
|
|
dev->netdev_ops = &cvm_oct_xaui_netdev_ops;
|
|
strcpy(dev->name, "xaui%d");
|
|
break;
|
|
|
|
case CVMX_HELPER_INTERFACE_MODE_LOOP:
|
|
dev->netdev_ops = &cvm_oct_npi_netdev_ops;
|
|
strcpy(dev->name, "loop%d");
|
|
break;
|
|
|
|
case CVMX_HELPER_INTERFACE_MODE_SGMII:
|
|
dev->netdev_ops = &cvm_oct_sgmii_netdev_ops;
|
|
strcpy(dev->name, "eth%d");
|
|
break;
|
|
|
|
case CVMX_HELPER_INTERFACE_MODE_SPI:
|
|
dev->netdev_ops = &cvm_oct_spi_netdev_ops;
|
|
strcpy(dev->name, "spi%d");
|
|
break;
|
|
|
|
case CVMX_HELPER_INTERFACE_MODE_RGMII:
|
|
case CVMX_HELPER_INTERFACE_MODE_GMII:
|
|
dev->netdev_ops = &cvm_oct_rgmii_netdev_ops;
|
|
strcpy(dev->name, "eth%d");
|
|
break;
|
|
}
|
|
|
|
if (!dev->netdev_ops) {
|
|
kfree(dev);
|
|
} else if (register_netdev(dev) < 0) {
|
|
pr_err("Failed to register ethernet device "
|
|
"for interface %d, port %d\n",
|
|
interface, priv->port);
|
|
kfree(dev);
|
|
} else {
|
|
cvm_oct_device[priv->port] = dev;
|
|
fau -=
|
|
cvmx_pko_get_num_queues(priv->port) *
|
|
sizeof(uint32_t);
|
|
}
|
|
}
|
|
}
|
|
|
|
if (INTERRUPT_LIMIT) {
|
|
/*
|
|
* Set the POW timer rate to give an interrupt at most
|
|
* INTERRUPT_LIMIT times per second.
|
|
*/
|
|
cvmx_write_csr(CVMX_POW_WQ_INT_PC,
|
|
octeon_bootinfo->eclock_hz / (INTERRUPT_LIMIT *
|
|
16 * 256) << 8);
|
|
|
|
/*
|
|
* Enable POW timer interrupt. It will count when
|
|
* there are packets available.
|
|
*/
|
|
cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group),
|
|
0x1ful << 24);
|
|
} else {
|
|
/* Enable POW interrupt when our port has at least one packet */
|
|
cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1001);
|
|
}
|
|
|
|
/* Enable the poll timer for checking RGMII status */
|
|
init_timer(&cvm_oct_poll_timer);
|
|
cvm_oct_poll_timer.data = 0;
|
|
cvm_oct_poll_timer.function = cvm_do_timer;
|
|
mod_timer(&cvm_oct_poll_timer, jiffies + HZ);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* Module / driver shutdown
|
|
*
|
|
* Returns Zero on success
|
|
*/
|
|
static void __exit cvm_oct_cleanup_module(void)
|
|
{
|
|
int port;
|
|
|
|
/* Disable POW interrupt */
|
|
cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0);
|
|
|
|
cvmx_ipd_disable();
|
|
|
|
/* Free the interrupt handler */
|
|
free_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group, cvm_oct_device);
|
|
|
|
del_timer(&cvm_oct_poll_timer);
|
|
cvm_oct_rx_shutdown();
|
|
cvmx_pko_disable();
|
|
|
|
/* Free the ethernet devices */
|
|
for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) {
|
|
if (cvm_oct_device[port]) {
|
|
cvm_oct_tx_shutdown(cvm_oct_device[port]);
|
|
unregister_netdev(cvm_oct_device[port]);
|
|
kfree(cvm_oct_device[port]);
|
|
cvm_oct_device[port] = NULL;
|
|
}
|
|
}
|
|
|
|
cvmx_pko_shutdown();
|
|
cvm_oct_proc_shutdown();
|
|
|
|
cvmx_ipd_free_ptr();
|
|
|
|
/* Free the HW pools */
|
|
cvm_oct_mem_empty_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
|
|
num_packet_buffers);
|
|
cvm_oct_mem_empty_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
|
|
num_packet_buffers);
|
|
if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
|
|
cvm_oct_mem_empty_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
|
|
CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128);
|
|
}
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>");
|
|
MODULE_DESCRIPTION("Cavium Networks Octeon ethernet driver.");
|
|
module_init(cvm_oct_init_module);
|
|
module_exit(cvm_oct_cleanup_module);
|