Mark Rutland 3cea71bc6b arm64: ensure completion of TLB invalidatation ... Currently there is no dsb between the tlbi in __cpu_setup and the write to SCTLR_EL1 which enables the MMU in __turn_mmu_on. This means that the TLB invalidation is not guaranteed to have completed at the point address translation is enabled, leading to a number of possible issues including incorrect translations and TLB conflict faults. This patch moves the tlbi in __cpu_setup above an existing dsb used to synchronise I-cache invalidation, ensuring that the TLBs have been invalidated at the point the MMU is enabled. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>		2013-12-06 17:21:49 +00:00
..
cache.S	arm64: mm: Fix operands of clz in __flush_dcache_all	2013-05-14 15:44:50 +01:00
context.c
copypage.c
dma-mapping.c
extable.c
fault.c	arm64: Make do_bad_area() function static	2013-09-20 09:56:05 +01:00
flush.c	arm64: Remove __flush_dcache_page()	2013-06-07 17:58:30 +01:00
hugetlbpage.c	mm: migrate: check movability of hugepage in unmap_and_move_huge_page()	2013-09-11 15:57:49 -07:00
init.c	arm64: remove unnecessary prom.h include	2013-10-09 20:04:00 -05:00
ioremap.c	arm64: allow ioremap_cache() to use existing RAM mappings	2013-10-30 12:10:37 +00:00
Makefile	ARM64: mm: HugeTLB support.	2013-06-14 09:52:40 +01:00
mm.h	arm64: Remove __flush_dcache_page()	2013-06-07 17:58:30 +01:00
mmap.c	mm: remove free_area_cache	2013-07-10 18:11:34 -07:00
mmu.c	arm64: Fix mapping of memory banks not ending on a PMD_SIZE boundary	2013-08-28 10:47:00 +01:00
pgd.c
proc-macros.S
proc.S	arm64: ensure completion of TLB invalidatation	2013-12-06 17:21:49 +00:00
tlb.S	arm64: use correct register width when retrieving ASID	2013-09-25 16:42:23 +01:00