42a7bf4d26
v2: fixes from Russell King - include linux/io.h instead of mach/io.h v3: fixes from Linus Walleij - remove /16 * 16 from UART clock v3: - Fix checkpatch issues - make board init calls explicit - use clock init table to set clocks - remove panel Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Erik Gilling <konkers@android.com>
128 lines
3.1 KiB
C
128 lines
3.1 KiB
C
/*
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* arch/arm/mach-tegra/board-harmony.c
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*
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* Copyright (C) 2010 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/pda_power.h>
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#include <linux/io.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/setup.h>
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#include <mach/iomap.h>
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#include <mach/irqs.h>
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#include "board.h"
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#include "board-harmony.h"
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#include "clock.h"
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/* NVidia bootloader tags */
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#define ATAG_NVIDIA 0x41000801
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#define ATAG_NVIDIA_RM 0x1
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#define ATAG_NVIDIA_DISPLAY 0x2
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#define ATAG_NVIDIA_FRAMEBUFFER 0x3
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#define ATAG_NVIDIA_CHIPSHMOO 0x4
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#define ATAG_NVIDIA_CHIPSHMOOPHYS 0x5
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#define ATAG_NVIDIA_PRESERVED_MEM_0 0x10000
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#define ATAG_NVIDIA_PRESERVED_MEM_N 2
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#define ATAG_NVIDIA_FORCE_32 0x7fffffff
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struct tag_tegra {
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__u32 bootarg_key;
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__u32 bootarg_len;
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char bootarg[1];
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};
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static int __init parse_tag_nvidia(const struct tag *tag)
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{
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return 0;
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}
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__tagtable(ATAG_NVIDIA, parse_tag_nvidia);
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static struct plat_serial8250_port debug_uart_platform_data[] = {
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{
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.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
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.mapbase = TEGRA_UARTD_BASE,
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.irq = INT_UARTD,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = 216000000,
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}, {
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.flags = 0
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}
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};
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static struct platform_device debug_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = debug_uart_platform_data,
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},
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};
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static struct platform_device *harmony_devices[] __initdata = {
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&debug_uart,
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};
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static void __init tegra_harmony_fixup(struct machine_desc *desc,
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struct tag *tags, char **cmdline, struct meminfo *mi)
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{
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mi->nr_banks = 2;
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mi->bank[0].start = PHYS_OFFSET;
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mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET);
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mi->bank[0].size = 448 * SZ_1M;
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mi->bank[1].start = SZ_512M;
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mi->bank[1].node = PHYS_TO_NID(SZ_512M);
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mi->bank[1].size = SZ_512M;
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}
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static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = {
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/* name parent rate enabled */
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{ "uartd", "pll_p", 216000000, true },
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{ NULL, NULL, 0, 0},
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};
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static void __init tegra_harmony_init(void)
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{
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tegra_common_init();
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tegra_clk_init_from_table(harmony_clk_init_table);
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harmony_pinmux_init();
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platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
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}
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MACHINE_START(HARMONY, "harmony")
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.boot_params = 0x00000100,
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.phys_io = IO_APB_PHYS,
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.io_pg_offst = ((IO_APB_VIRT) >> 18) & 0xfffc,
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.fixup = tegra_harmony_fixup,
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.init_irq = tegra_init_irq,
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.init_machine = tegra_harmony_init,
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.map_io = tegra_map_common_io,
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.timer = &tegra_timer,
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MACHINE_END
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