c1017a4cdb
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
1214 lines
28 KiB
C
1214 lines
28 KiB
C
/*
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* The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
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* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*
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* NOTE: comments are copy/paste from cwcemb80.lst
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* provided by Tom Woller at Cirrus (my only
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* documentation about the SP OS running inside
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* the DSP)
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*/
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#ifndef __CS46XX_DSP_SCB_TYPES_H__
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#define __CS46XX_DSP_SCB_TYPES_H__
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#include <asm/byteorder.h>
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#ifndef ___DSP_DUAL_16BIT_ALLOC
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#if defined(__LITTLE_ENDIAN)
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#define ___DSP_DUAL_16BIT_ALLOC(a,b) u16 a; u16 b;
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#elif defined(__BIG_ENDIAN)
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#define ___DSP_DUAL_16BIT_ALLOC(a,b) u16 b; u16 a;
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#else
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#error Not __LITTLE_ENDIAN and not __BIG_ENDIAN, then what ???
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#endif
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#endif
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/* This structs are used internally by the SP */
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struct dsp_basic_dma_req {
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/* DMA Requestor Word 0 (DCW) fields:
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31 [30-28]27 [26:24] 23 22 21 20 [19:18] [17:16] 15 14 13 12 11 10 9 8 7 6 [5:0]
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_______________________________________________________________________________________
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|S| SBT |D| DBT |wb|wb| | | LS | SS |Opt|Do|SSG|DSG| | | | | | | Dword |
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|H|_____ |H|_________|S_|D |__|__|______|_______|___|ne|__ |__ |__|__|_|_|_|_|_Count -1|
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*/
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u32 dcw; /* DMA Control Word */
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u32 dmw; /* DMA Mode Word */
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u32 saw; /* Source Address Word */
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u32 daw; /* Destination Address Word */
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};
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struct dsp_scatter_gather_ext {
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u32 npaw; /* Next-Page Address Word */
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/* DMA Requestor Word 5 (NPCW) fields:
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31-30 29 28 [27:16] [15:12] [11:3] [2:0]
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_________________________________________________________________________________________
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|SV |LE|SE| Sample-end byte offset | | Page-map entry offset for next | |
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|page|__|__| ___________________________|_________|__page, if !sample-end___________|____|
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*/
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u32 npcw; /* Next-Page Control Word */
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u32 lbaw; /* Loop-Begin Address Word */
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u32 nplbaw; /* Next-Page after Loop-Begin Address Word */
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u32 sgaw; /* Scatter/Gather Address Word */
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};
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struct dsp_volume_control {
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___DSP_DUAL_16BIT_ALLOC(
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rightTarg, /* Target volume for left & right channels */
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leftTarg
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)
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___DSP_DUAL_16BIT_ALLOC(
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rightVol, /* Current left & right channel volumes */
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leftVol
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)
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};
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/* Generic stream control block (SCB) structure definition */
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struct dsp_generic_scb {
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/* For streaming I/O, the DSP should never alter any words in the DMA
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requestor or the scatter/gather extension. Only ad hoc DMA request
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streams are free to alter the requestor (currently only occur in the
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DOS-based MIDI controller and in debugger-inserted code).
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If an SCB does not have any associated DMA requestor, these 9 ints
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may be freed for use by other tasks, but the pointer to the SCB must
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still be such that the insOrd:nextSCB appear at offset 9 from the
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SCB pointer.
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Basic (non scatter/gather) DMA requestor (4 ints)
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*/
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/* Initialized by the host, only modified by DMA
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R/O for the DSP task */
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struct dsp_basic_dma_req basic_req; /* Optional */
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/* Scatter/gather DMA requestor extension (5 ints)
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Initialized by the host, only modified by DMA
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DSP task never needs to even read these.
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*/
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struct dsp_scatter_gather_ext sg_ext; /* Optional */
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/* Sublist pointer & next stream control block (SCB) link.
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Initialized & modified by the host R/O for the DSP task
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*/
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___DSP_DUAL_16BIT_ALLOC(
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next_scb, /* REQUIRED */
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sub_list_ptr /* REQUIRED */
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)
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/* Pointer to this tasks parameter block & stream function pointer
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Initialized by the host R/O for the DSP task */
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___DSP_DUAL_16BIT_ALLOC(
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entry_point, /* REQUIRED */
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this_spb /* REQUIRED */
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)
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/* rsConfig register for stream buffer (rsDMA reg.
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is loaded from basicReq.daw for incoming streams, or
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basicReq.saw, for outgoing streams)
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31 30 29 [28:24] [23:16] 15 14 13 12 11 10 9 8 7 6 5 4 [3:0]
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______________________________________________________________________________
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|DMA |D|maxDMAsize| streamNum|dir|p| | | | | | |ds |shr 1|rev Cy | mod |
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|prio |_|__________|__________|___|_|__|__|__|__|_|_|___|_____|_______|_______|
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31 30 29 [28:24] [23:16] 15 14 13 12 11 10 9 8 7 6 5 4 [3:0]
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Initialized by the host R/O for the DSP task
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*/
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u32 strm_rs_config; /* REQUIRED */
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//
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/* On mixer input streams: indicates mixer input stream configuration
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On Tees, this is copied from the stream being snooped
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Stream sample pointer & MAC-unit mode for this stream
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Initialized by the host Updated by the DSP task
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*/
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u32 strm_buf_ptr; /* REQUIRED */
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/* On mixer input streams: points to next mixer input and is updated by the
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mixer subroutine in the "parent" DSP task
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(least-significant 16 bits are preserved, unused)
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On Tees, the pointer is copied from the stream being snooped on
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initialization, and, subsequently, it is copied into the
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stream being snooped.
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On wavetable/3D voices: the strmBufPtr will use all 32 bits to allow for
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fractional phase accumulation
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Fractional increment per output sample in the input sample buffer
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(Not used on mixer input streams & redefined on Tees)
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On wavetable/3D voices: this 32-bit word specifies the integer.fractional
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increment per output sample.
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*/
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u32 strmPhiIncr;
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/* Standard stereo volume control
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Initialized by the host (host updates target volumes)
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Current volumes update by the DSP task
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On mixer input streams: required & updated by the mixer subroutine in the
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"parent" DSP task
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On Tees, both current & target volumes are copied up on initialization,
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and, subsequently, the target volume is copied up while the current
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volume is copied down.
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These two 32-bit words are redefined for wavetable & 3-D voices.
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*/
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struct dsp_volume_control vol_ctrl_t; /* Optional */
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};
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struct dsp_spos_control_block {
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/* WARNING: Certain items in this structure are modified by the host
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Any dword that can be modified by the host, must not be
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modified by the SP as the host can only do atomic dword
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writes, and to do otherwise, even a read modify write,
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may lead to corrupted data on the SP.
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This rule does not apply to one off boot time initialisation prior to starting the SP
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*/
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___DSP_DUAL_16BIT_ALLOC(
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/* First element on the Hyper forground task tree */
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hfg_tree_root_ptr, /* HOST */
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/* First 3 dwords are written by the host and read-only on the DSP */
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hfg_stack_base /* HOST */
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)
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___DSP_DUAL_16BIT_ALLOC(
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/* Point to this data structure to enable easy access */
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spos_cb_ptr, /* SP */
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prev_task_tree_ptr /* SP && HOST */
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)
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___DSP_DUAL_16BIT_ALLOC(
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/* Currently Unused */
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xxinterval_timer_period,
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/* Enable extension of SPOS data structure */
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HFGSPB_ptr
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)
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___DSP_DUAL_16BIT_ALLOC(
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xxnum_HFG_ticks_thisInterval,
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/* Modified by the DSP */
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xxnum_tntervals
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)
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/* Set by DSP upon encountering a trap (breakpoint) or a spurious
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interrupt. The host must clear this dword after reading it
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upon receiving spInt1. */
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___DSP_DUAL_16BIT_ALLOC(
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spurious_int_flag, /* (Host & SP) Nature of the spurious interrupt */
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trap_flag /* (Host & SP) Nature of detected Trap */
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)
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___DSP_DUAL_16BIT_ALLOC(
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unused2,
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invalid_IP_flag /* (Host & SP ) Indicate detection of invalid instruction pointer */
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)
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___DSP_DUAL_16BIT_ALLOC(
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/* pointer to forground task tree header for use in next task search */
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fg_task_tree_hdr_ptr, /* HOST */
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/* Data structure for controlling synchronous link update */
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hfg_sync_update_ptr /* HOST */
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)
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___DSP_DUAL_16BIT_ALLOC(
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begin_foreground_FCNT, /* SP */
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/* Place holder for holding sleep timing */
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last_FCNT_before_sleep /* SP */
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)
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___DSP_DUAL_16BIT_ALLOC(
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unused7, /* SP */
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next_task_treePtr /* SP */
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)
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u32 unused5;
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___DSP_DUAL_16BIT_ALLOC(
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active_flags, /* SP */
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/* State flags, used to assist control of execution of Hyper Forground */
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HFG_flags /* SP */
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)
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___DSP_DUAL_16BIT_ALLOC(
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unused9,
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unused8
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)
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/* Space for saving enough context so that we can set up enough
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to save some more context.
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*/
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u32 rFE_save_for_invalid_IP;
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u32 r32_save_for_spurious_int;
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u32 r32_save_for_trap;
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u32 r32_save_for_HFG;
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};
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/* SPB for MIX_TO_OSTREAM algorithm family */
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struct dsp_mix2_ostream_spb
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{
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/* 16b.16b integer.frac approximation to the
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number of 3 sample triplets to output each
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frame. (approximation must be floor, to
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insure that the fractional error is always
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positive)
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*/
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u32 outTripletsPerFrame;
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/* 16b.16b integer.frac accumulated number of
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output triplets since the start of group
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*/
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u32 accumOutTriplets;
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};
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/* SCB for Timing master algorithm */
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struct dsp_timing_master_scb {
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/* First 12 dwords from generic_scb_t */
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struct dsp_basic_dma_req basic_req; /* Optional */
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struct dsp_scatter_gather_ext sg_ext; /* Optional */
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___DSP_DUAL_16BIT_ALLOC(
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next_scb, /* REQUIRED */
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sub_list_ptr /* REQUIRED */
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)
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___DSP_DUAL_16BIT_ALLOC(
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entry_point, /* REQUIRED */
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this_spb /* REQUIRED */
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)
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___DSP_DUAL_16BIT_ALLOC(
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/* Initial values are 0000:xxxx */
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reserved,
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extra_sample_accum
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)
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/* Initial values are xxxx:0000
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hi: Current CODEC output FIFO pointer
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(0 to 0x0f)
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lo: Flag indicating that the CODEC
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FIFO is sync'd (host clears to
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resynchronize the FIFO pointer
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upon start/restart)
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*/
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___DSP_DUAL_16BIT_ALLOC(
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codec_FIFO_syncd,
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codec_FIFO_ptr
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)
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/* Init. 8000:0005 for 44.1k
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8000:0001 for 48k
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hi: Fractional sample accumulator 0.16b
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lo: Number of frames remaining to be
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processed in the current group of
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frames
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*/
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___DSP_DUAL_16BIT_ALLOC(
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frac_samp_accum_qm1,
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TM_frms_left_in_group
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)
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/* Init. 0001:0005 for 44.1k
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0000:0001 for 48k
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hi: Fractional sample correction factor 0.16b
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to be added every frameGroupLength frames
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to correct for truncation error in
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nsamp_per_frm_q15
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lo: Number of frames in the group
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*/
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___DSP_DUAL_16BIT_ALLOC(
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frac_samp_correction_qm1,
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TM_frm_group_length
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)
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/* Init. 44.1k*65536/8k = 0x00058333 for 44.1k
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48k*65536/8k = 0x00060000 for 48k
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16b.16b integer.frac approximation to the
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number of samples to output each frame.
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(approximation must be floor, to insure */
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u32 nsamp_per_frm_q15;
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};
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/* SCB for CODEC output algorithm */
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struct dsp_codec_output_scb {
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/* First 13 dwords from generic_scb_t */
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struct dsp_basic_dma_req basic_req; /* Optional */
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struct dsp_scatter_gather_ext sg_ext; /* Optional */
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___DSP_DUAL_16BIT_ALLOC(
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next_scb, /* REQUIRED */
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sub_list_ptr /* REQUIRED */
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)
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___DSP_DUAL_16BIT_ALLOC(
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entry_point, /* REQUIRED */
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this_spb /* REQUIRED */
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)
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u32 strm_rs_config; /* REQUIRED */
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u32 strm_buf_ptr; /* REQUIRED */
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/* NOTE: The CODEC output task reads samples from the first task on its
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sublist at the stream buffer pointer (init. to lag DMA destination
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address word). After the required number of samples is transferred,
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the CODEC output task advances sub_list_ptr->strm_buf_ptr past the samples
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consumed.
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*/
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/* Init. 0000:0010 for SDout
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0060:0010 for SDout2
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0080:0010 for SDout3
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hi: Base IO address of FIFO to which
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the left-channel samples are to
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be written.
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lo: Displacement for the base IO
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address for left-channel to obtain
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the base IO address for the FIFO
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to which the right-channel samples
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are to be written.
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*/
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___DSP_DUAL_16BIT_ALLOC(
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left_chan_base_IO_addr,
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right_chan_IO_disp
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)
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/* Init: 0x0080:0004 for non-AC-97
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Init: 0x0080:0000 for AC-97
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hi: Exponential volume change rate
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for input stream
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lo: Positive shift count to shift the
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16-bit input sample to obtain the
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32-bit output word
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*/
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___DSP_DUAL_16BIT_ALLOC(
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CO_scale_shift_count,
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CO_exp_vol_change_rate
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)
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/* Pointer to SCB at end of input chain */
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___DSP_DUAL_16BIT_ALLOC(
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reserved,
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last_sub_ptr
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)
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};
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/* SCB for CODEC input algorithm */
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struct dsp_codec_input_scb {
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/* First 13 dwords from generic_scb_t */
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struct dsp_basic_dma_req basic_req; /* Optional */
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struct dsp_scatter_gather_ext sg_ext; /* Optional */
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___DSP_DUAL_16BIT_ALLOC(
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next_scb, /* REQUIRED */
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sub_list_ptr /* REQUIRED */
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)
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___DSP_DUAL_16BIT_ALLOC(
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entry_point, /* REQUIRED */
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this_spb /* REQUIRED */
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)
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u32 strm_rs_config; /* REQUIRED */
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u32 strm_buf_ptr; /* REQUIRED */
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/* NOTE: The CODEC input task reads samples from the hardware FIFO
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sublist at the DMA source address word (sub_list_ptr->basic_req.saw).
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After the required number of samples is transferred, the CODEC
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output task advances sub_list_ptr->basic_req.saw past the samples
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consumed. SPuD must initialize the sub_list_ptr->basic_req.saw
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to point half-way around from the initial sub_list_ptr->strm_nuf_ptr
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to allow for lag/lead.
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*/
|
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/* Init. 0000:0010 for SDout
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0060:0010 for SDout2
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0080:0010 for SDout3
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hi: Base IO address of FIFO to which
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the left-channel samples are to
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be written.
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lo: Displacement for the base IO
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address for left-channel to obtain
|
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the base IO address for the FIFO
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to which the right-channel samples
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are to be written.
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*/
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___DSP_DUAL_16BIT_ALLOC(
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rightChanINdisp,
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left_chan_base_IN_addr
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)
|
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/* Init. ?:fffc
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lo: Negative shift count to shift the
|
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32-bit input dword to obtain the
|
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16-bit sample msb-aligned (count
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is negative to shift left)
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*/
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___DSP_DUAL_16BIT_ALLOC(
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scaleShiftCount,
|
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reserver1
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)
|
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u32 reserved2;
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};
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|
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struct dsp_pcm_serial_input_scb {
|
|
/* First 13 dwords from generic_scb_t */
|
|
struct dsp_basic_dma_req basic_req; /* Optional */
|
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struct dsp_scatter_gather_ext sg_ext; /* Optional */
|
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___DSP_DUAL_16BIT_ALLOC(
|
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next_scb, /* REQUIRED */
|
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sub_list_ptr /* REQUIRED */
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)
|
|
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___DSP_DUAL_16BIT_ALLOC(
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entry_point, /* REQUIRED */
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this_spb /* REQUIRED */
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)
|
|
|
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u32 strm_buf_ptr; /* REQUIRED */
|
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u32 strm_rs_config; /* REQUIRED */
|
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|
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/* Init. Ptr to CODEC input SCB
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hi: Pointer to the SCB containing the
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input buffer to which CODEC input
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samples are written
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lo: Flag indicating the link to the CODEC
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input task is to be initialized
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*/
|
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___DSP_DUAL_16BIT_ALLOC(
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init_codec_input_link,
|
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codec_input_buf_scb
|
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)
|
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|
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/* Initialized by the host (host updates target volumes) */
|
|
struct dsp_volume_control psi_vol_ctrl;
|
|
|
|
};
|
|
|
|
struct dsp_src_task_scb {
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
frames_left_in_gof,
|
|
gofs_left_in_sec
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
const2_thirds,
|
|
num_extra_tnput_samples
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
cor_per_gof,
|
|
correction_per_sec
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
output_buf_producer_ptr,
|
|
junk_DMA_MID
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
gof_length,
|
|
gofs_per_sec
|
|
)
|
|
|
|
u32 input_buf_strm_config;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
reserved_for_SRC_use,
|
|
input_buf_consumer_ptr
|
|
)
|
|
|
|
u32 accum_phi;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
exp_src_vol_change_rate,
|
|
input_buf_producer_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
src_next_scb,
|
|
src_sub_list_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
src_entry_point,
|
|
src_this_sbp
|
|
)
|
|
|
|
u32 src_strm_rs_config;
|
|
u32 src_strm_buf_ptr;
|
|
|
|
u32 phiIncr6int_26frac;
|
|
|
|
struct dsp_volume_control src_vol_ctrl;
|
|
};
|
|
|
|
struct dsp_decimate_by_pow2_scb {
|
|
/* decimationFactor = 2, 4, or 8 (larger factors waste too much memory
|
|
when compared to cascading decimators)
|
|
*/
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
dec2_coef_base_ptr,
|
|
dec2_coef_increment
|
|
)
|
|
|
|
/* coefIncrement = 128 / decimationFactor (for our ROM filter)
|
|
coefBasePtr = 0x8000 (for our ROM filter)
|
|
*/
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
dec2_in_samples_per_out_triplet,
|
|
dec2_extra_in_samples
|
|
)
|
|
/* extraInSamples: # of accumulated, unused input samples (init. to 0)
|
|
inSamplesPerOutTriplet = 3 * decimationFactor
|
|
*/
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
dec2_const2_thirds,
|
|
dec2_half_num_taps_mp5
|
|
)
|
|
/* halfNumTapsM5: (1/2 number of taps in decimation filter) minus 5
|
|
const2thirds: constant 2/3 in 16Q0 format (sign.15)
|
|
*/
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
dec2_output_buf_producer_ptr,
|
|
dec2_junkdma_mid
|
|
)
|
|
|
|
u32 dec2_reserved2;
|
|
|
|
u32 dec2_input_nuf_strm_config;
|
|
/* inputBufStrmConfig: rsConfig for the input buffer to the decimator
|
|
(buffer size = decimationFactor * 32 dwords)
|
|
*/
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
dec2_phi_incr,
|
|
dec2_input_buf_consumer_ptr
|
|
)
|
|
/* inputBufConsumerPtr: Input buffer read pointer (into SRC filter)
|
|
phiIncr = decimationFactor * 4
|
|
*/
|
|
|
|
u32 dec2_reserved3;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
dec2_exp_vol_change_rate,
|
|
dec2_input_buf_producer_ptr
|
|
)
|
|
/* inputBufProducerPtr: Input buffer write pointer
|
|
expVolChangeRate: Exponential volume change rate for possible
|
|
future mixer on input streams
|
|
*/
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
dec2_next_scb,
|
|
dec2_sub_list_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
dec2_entry_point,
|
|
dec2_this_spb
|
|
)
|
|
|
|
u32 dec2_strm_rs_config;
|
|
u32 dec2_strm_buf_ptr;
|
|
|
|
u32 dec2_reserved4;
|
|
|
|
struct dsp_volume_control dec2_vol_ctrl; /* Not used! */
|
|
};
|
|
|
|
struct dsp_vari_decimate_scb {
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
vdec_frames_left_in_gof,
|
|
vdec_gofs_left_in_sec
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
vdec_const2_thirds,
|
|
vdec_extra_in_samples
|
|
)
|
|
/* extraInSamples: # of accumulated, unused input samples (init. to 0)
|
|
const2thirds: constant 2/3 in 16Q0 format (sign.15) */
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
vdec_cor_per_gof,
|
|
vdec_correction_per_sec
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
vdec_output_buf_producer_ptr,
|
|
vdec_input_buf_consumer_ptr
|
|
)
|
|
/* inputBufConsumerPtr: Input buffer read pointer (into SRC filter) */
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
vdec_gof_length,
|
|
vdec_gofs_per_sec
|
|
)
|
|
|
|
u32 vdec_input_buf_strm_config;
|
|
/* inputBufStrmConfig: rsConfig for the input buffer to the decimator
|
|
(buffer size = 64 dwords) */
|
|
u32 vdec_coef_increment;
|
|
/* coefIncrement = - 128.0 / decimationFactor (as a 32Q15 number) */
|
|
|
|
u32 vdec_accumphi;
|
|
/* accumPhi: accumulated fractional phase increment (6.26) */
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
vdec_exp_vol_change_rate,
|
|
vdec_input_buf_producer_ptr
|
|
)
|
|
/* inputBufProducerPtr: Input buffer write pointer
|
|
expVolChangeRate: Exponential volume change rate for possible
|
|
future mixer on input streams */
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
vdec_next_scb,
|
|
vdec_sub_list_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
vdec_entry_point,
|
|
vdec_this_spb
|
|
)
|
|
|
|
u32 vdec_strm_rs_config;
|
|
u32 vdec_strm_buf_ptr;
|
|
|
|
u32 vdec_phi_incr_6int_26frac;
|
|
|
|
struct dsp_volume_control vdec_vol_ctrl;
|
|
};
|
|
|
|
|
|
/* SCB for MIX_TO_OSTREAM algorithm family */
|
|
struct dsp_mix2_ostream_scb {
|
|
/* First 13 dwords from generic_scb_t */
|
|
struct dsp_basic_dma_req basic_req; /* Optional */
|
|
struct dsp_scatter_gather_ext sg_ext; /* Optional */
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
next_scb, /* REQUIRED */
|
|
sub_list_ptr /* REQUIRED */
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
entry_point, /* REQUIRED */
|
|
this_spb /* REQUIRED */
|
|
)
|
|
|
|
u32 strm_rs_config; /* REQUIRED */
|
|
u32 strm_buf_ptr; /* REQUIRED */
|
|
|
|
|
|
/* hi: Number of mixed-down input triplets
|
|
computed since start of group
|
|
lo: Number of frames remaining to be
|
|
processed in the current group of
|
|
frames
|
|
*/
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
frames_left_in_group,
|
|
accum_input_triplets
|
|
)
|
|
|
|
/* hi: Exponential volume change rate
|
|
for mixer on input streams
|
|
lo: Number of frames in the group
|
|
*/
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
frame_group_length,
|
|
exp_vol_change_rate
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
const_FFFF,
|
|
const_zero
|
|
)
|
|
};
|
|
|
|
|
|
/* SCB for S16_MIX algorithm */
|
|
struct dsp_mix_only_scb {
|
|
/* First 13 dwords from generic_scb_t */
|
|
struct dsp_basic_dma_req basic_req; /* Optional */
|
|
struct dsp_scatter_gather_ext sg_ext; /* Optional */
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
next_scb, /* REQUIRED */
|
|
sub_list_ptr /* REQUIRED */
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
entry_point, /* REQUIRED */
|
|
this_spb /* REQUIRED */
|
|
)
|
|
|
|
u32 strm_rs_config; /* REQUIRED */
|
|
u32 strm_buf_ptr; /* REQUIRED */
|
|
|
|
u32 reserved;
|
|
struct dsp_volume_control vol_ctrl;
|
|
};
|
|
|
|
/* SCB for the async. CODEC input algorithm */
|
|
struct dsp_async_codec_input_scb {
|
|
u32 io_free2;
|
|
|
|
u32 io_current_total;
|
|
u32 io_previous_total;
|
|
|
|
u16 io_count;
|
|
u16 io_count_limit;
|
|
|
|
u16 o_fifo_base_addr;
|
|
u16 ost_mo_format;
|
|
/* 1 = stereo; 0 = mono
|
|
xxx for ASER 1 (not allowed); 118 for ASER2 */
|
|
|
|
u32 ostrm_rs_config;
|
|
u32 ostrm_buf_ptr;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
io_sclks_per_lr_clk,
|
|
io_io_enable
|
|
)
|
|
|
|
u32 io_free4;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
io_next_scb,
|
|
io_sub_list_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
io_entry_point,
|
|
io_this_spb
|
|
)
|
|
|
|
u32 istrm_rs_config;
|
|
u32 istrm_buf_ptr;
|
|
|
|
/* Init. 0000:8042: for ASER1
|
|
0000:8044: for ASER2 */
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
io_stat_reg_addr,
|
|
iofifo_pointer
|
|
)
|
|
|
|
/* Init 1 stero:100 ASER1
|
|
Init 0 mono:110 ASER2
|
|
*/
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
ififo_base_addr,
|
|
ist_mo_format
|
|
)
|
|
|
|
u32 i_free;
|
|
};
|
|
|
|
|
|
/* SCB for the SP/DIF CODEC input and output */
|
|
struct dsp_spdifiscb {
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
status_ptr,
|
|
status_start_ptr
|
|
)
|
|
|
|
u32 current_total;
|
|
u32 previous_total;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
count,
|
|
count_limit
|
|
)
|
|
|
|
u32 status_data;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
status,
|
|
free4
|
|
)
|
|
|
|
u32 free3;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
free2,
|
|
bit_count
|
|
)
|
|
|
|
u32 temp_status;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
next_SCB,
|
|
sub_list_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
entry_point,
|
|
this_spb
|
|
)
|
|
|
|
u32 strm_rs_config;
|
|
u32 strm_buf_ptr;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
stat_reg_addr,
|
|
fifo_pointer
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
fifo_base_addr,
|
|
st_mo_format
|
|
)
|
|
|
|
u32 free1;
|
|
};
|
|
|
|
|
|
/* SCB for the SP/DIF CODEC input and output */
|
|
struct dsp_spdifoscb {
|
|
|
|
u32 free2;
|
|
|
|
u32 free3[4];
|
|
|
|
/* Need to be here for compatibility with AsynchFGTxCode */
|
|
u32 strm_rs_config;
|
|
|
|
u32 strm_buf_ptr;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
status,
|
|
free5
|
|
)
|
|
|
|
u32 free4;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
next_scb,
|
|
sub_list_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
entry_point,
|
|
this_spb
|
|
)
|
|
|
|
u32 free6[2];
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
stat_reg_addr,
|
|
fifo_pointer
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
fifo_base_addr,
|
|
st_mo_format
|
|
)
|
|
|
|
u32 free1;
|
|
};
|
|
|
|
|
|
struct dsp_asynch_fg_rx_scb {
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
bot_buf_mask,
|
|
buf_Mask
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
max,
|
|
min
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
old_producer_pointer,
|
|
hfg_scb_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
delta,
|
|
adjust_count
|
|
)
|
|
|
|
u32 unused2[5];
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
sibling_ptr,
|
|
child_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
code_ptr,
|
|
this_ptr
|
|
)
|
|
|
|
u32 strm_rs_config;
|
|
|
|
u32 strm_buf_ptr;
|
|
|
|
u32 unused_phi_incr;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
right_targ,
|
|
left_targ
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
right_vol,
|
|
left_vol
|
|
)
|
|
};
|
|
|
|
|
|
struct dsp_asynch_fg_tx_scb {
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
not_buf_mask,
|
|
buf_mask
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
max,
|
|
min
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
unused1,
|
|
hfg_scb_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
delta,
|
|
adjust_count
|
|
)
|
|
|
|
u32 accum_phi;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
unused2,
|
|
const_one_third
|
|
)
|
|
|
|
u32 unused3[3];
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
sibling_ptr,
|
|
child_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
codePtr,
|
|
this_ptr
|
|
)
|
|
|
|
u32 strm_rs_config;
|
|
|
|
u32 strm_buf_ptr;
|
|
|
|
u32 phi_incr;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
unused_right_targ,
|
|
unused_left_targ
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
unused_right_vol,
|
|
unused_left_vol
|
|
)
|
|
};
|
|
|
|
|
|
struct dsp_output_snoop_scb {
|
|
/* First 13 dwords from generic_scb_t */
|
|
struct dsp_basic_dma_req basic_req; /* Optional */
|
|
struct dsp_scatter_gather_ext sg_ext; /* Optional */
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
next_scb, /* REQUIRED */
|
|
sub_list_ptr /* REQUIRED */
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
entry_point, /* REQUIRED */
|
|
this_spb /* REQUIRED */
|
|
)
|
|
|
|
u32 strm_rs_config; /* REQUIRED */
|
|
u32 strm_buf_ptr; /* REQUIRED */
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
init_snoop_input_link,
|
|
snoop_child_input_scb
|
|
)
|
|
|
|
u32 snoop_input_buf_ptr;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
reserved,
|
|
input_scb
|
|
)
|
|
};
|
|
|
|
struct dsp_spio_write_scb {
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
address1,
|
|
address2
|
|
)
|
|
|
|
u32 data1;
|
|
|
|
u32 data2;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
address3,
|
|
address4
|
|
)
|
|
|
|
u32 data3;
|
|
|
|
u32 data4;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
unused1,
|
|
data_ptr
|
|
)
|
|
|
|
u32 unused2[2];
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
sibling_ptr,
|
|
child_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
entry_point,
|
|
this_ptr
|
|
)
|
|
|
|
u32 unused3[5];
|
|
};
|
|
|
|
struct dsp_magic_snoop_task {
|
|
u32 i0;
|
|
u32 i1;
|
|
|
|
u32 strm_buf_ptr1;
|
|
|
|
u16 i2;
|
|
u16 snoop_scb;
|
|
|
|
u32 i3;
|
|
u32 i4;
|
|
u32 i5;
|
|
u32 i6;
|
|
|
|
u32 i7;
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
next_scb,
|
|
sub_list_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
entry_point,
|
|
this_ptr
|
|
)
|
|
|
|
u32 strm_buf_config;
|
|
u32 strm_buf_ptr2;
|
|
|
|
u32 i8;
|
|
|
|
struct dsp_volume_control vdec_vol_ctrl;
|
|
};
|
|
|
|
|
|
struct dsp_filter_scb {
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
a0_right, /* 0x00 */
|
|
a0_left
|
|
)
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
a1_right, /* 0x01 */
|
|
a1_left
|
|
)
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
a2_right, /* 0x02 */
|
|
a2_left
|
|
)
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
output_buf_ptr, /* 0x03 */
|
|
init
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
filter_unused3, /* 0x04 */
|
|
filter_unused2
|
|
)
|
|
|
|
u32 prev_sample_output1; /* 0x05 */
|
|
u32 prev_sample_output2; /* 0x06 */
|
|
u32 prev_sample_input1; /* 0x07 */
|
|
u32 prev_sample_input2; /* 0x08 */
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
next_scb_ptr, /* 0x09 */
|
|
sub_list_ptr
|
|
)
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
entry_point, /* 0x0A */
|
|
spb_ptr
|
|
)
|
|
|
|
u32 strm_rs_config; /* 0x0B */
|
|
u32 strm_buf_ptr; /* 0x0C */
|
|
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
b0_right, /* 0x0D */
|
|
b0_left
|
|
)
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
b1_right, /* 0x0E */
|
|
b1_left
|
|
)
|
|
___DSP_DUAL_16BIT_ALLOC(
|
|
b2_right, /* 0x0F */
|
|
b2_left
|
|
)
|
|
};
|
|
#endif /* __DSP_SCB_TYPES_H__ */
|