b59b284101
Switch to using the device tree to register serial ports.
Add all the ports with compatible = "cavium,octeon-3860-uart". Octeon serial
ports have their own device type, required port flags, and I/O
functions, so using of_serial.c is not indicated.
We need to do this as late_initcall, as the 8250 driver must be
initialized before we add any ports. 8250 initialization is done at
device_initcall time.
The OCTEON_IRQ_UART{0,1,2} symbols are removed as they are now unused
and interfere with irq_domain used by the device tree code.
Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3942/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
110 lines
2.6 KiB
C
110 lines
2.6 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2004-2007 Cavium Networks
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*/
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#include <linux/console.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/tty.h>
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#include <linux/irq.h>
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#include <asm/time.h>
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#include <asm/octeon/octeon.h>
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#define DEBUG_UART 1
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unsigned int octeon_serial_in(struct uart_port *up, int offset)
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{
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int rv = cvmx_read_csr((uint64_t)(up->membase + (offset << 3)));
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if (offset == UART_IIR && (rv & 0xf) == 7) {
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/* Busy interrupt, read the USR (39) and try again. */
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cvmx_read_csr((uint64_t)(up->membase + (39 << 3)));
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rv = cvmx_read_csr((uint64_t)(up->membase + (offset << 3)));
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}
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return rv;
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}
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void octeon_serial_out(struct uart_port *up, int offset, int value)
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{
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/*
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* If bits 6 or 7 of the OCTEON UART's LCR are set, it quits
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* working.
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*/
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if (offset == UART_LCR)
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value &= 0x9f;
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cvmx_write_csr((uint64_t)(up->membase + (offset << 3)), (u8)value);
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}
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static int __devinit octeon_serial_probe(struct platform_device *pdev)
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{
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int irq, res;
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struct resource *res_mem;
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struct uart_port port;
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/* All adaptors have an irq. */
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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memset(&port, 0, sizeof(port));
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port.flags = ASYNC_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE;
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port.type = PORT_OCTEON;
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port.iotype = UPIO_MEM;
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port.regshift = 3;
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port.dev = &pdev->dev;
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if (octeon_is_simulation())
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/* Make simulator output fast*/
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port.uartclk = 115200 * 16;
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else
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port.uartclk = octeon_get_io_clock_rate();
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port.serial_in = octeon_serial_in;
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port.serial_out = octeon_serial_out;
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port.irq = irq;
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res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res_mem == NULL) {
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dev_err(&pdev->dev, "found no memory resource\n");
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return -ENXIO;
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}
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port.mapbase = res_mem->start;
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port.membase = ioremap(res_mem->start, resource_size(res_mem));
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res = serial8250_register_port(&port);
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return res >= 0 ? 0 : res;
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}
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static struct of_device_id octeon_serial_match[] = {
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{
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.compatible = "cavium,octeon-3860-uart",
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, octeon_serial_match);
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static struct platform_driver octeon_serial_driver = {
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.probe = octeon_serial_probe,
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.driver = {
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.owner = THIS_MODULE,
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.name = "octeon_serial",
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.of_match_table = octeon_serial_match,
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},
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};
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static int __init octeon_serial_init(void)
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{
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return platform_driver_register(&octeon_serial_driver);
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}
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late_initcall(octeon_serial_init);
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