b3c3752292
A significant part of the changes for these two platforms went into power management, so they are split out into a separate branch. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUATwtaEmCrR//JCVInAQIUqBAAkqKDGCyKmC2nDfz5ejYNUvugkDxgYv5I fl9UUfBc2cLDVyOynzjH9SLTphVAI8jZa0KZAlvB8/+4Wcg7XNhUFPDH868zlPzP mSsPPTnb3WJTqb1PLKi7oTbA7CfsX/srRaAtrEX7Nng7uGTZZq+5RL6mOR/bqHyR F/VuV5U9HkDjgM7T7NtcNMqP9ysHDSrcNDse62yKh8FLot59rqXEEXZWTIYZphbI v+BURp4EHs5Wm5AVJbpGmWhk4+NgRCLE0ZKZlfxnJctFz5+bW11TX/85ua+UXtmt Fnij44jSmAzbQ1o0VLbN760iBsbPN/JElYWXwIqR6v5M+Hd2UDRm3a6Bc1xqUNx0 0C8DEoo78XebhldAsN1TL/V94j1ojuNyWC7qkn9VBZLTiVYPyV/oeIdxtR19u1lB QctpXeUPCfdDyD+wAWbqid0MExayP3TAwJ5vK8Tw+ssIv3A19RkUI6kdGaW4RqyL 5n5o7Ze4CGOzrthWuyfw5flKbjRUrmtLO6TTgPZKCwxeiQh3G1GJcCL6lKbGbH3M Z8jNWzEMMExZU+55P8hRrtNgnx6rqn2bWi/3cCSmuKB6KHBUWXfKJw3rmTcWOsLB aNSXqYoWtTK9hJ0zo1xIAGmnJlfrO9I66abCuHHjDKVh1W5j7zmZwrj4ErUuS/dO UHOmrQN/GOY= =P4kO -----END PGP SIGNATURE----- Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc power management changes for omap and imx A significant part of the changes for these two platforms went into power management, so they are split out into a separate branch. * tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (65 commits) ARM: imx6: remove __CPUINIT annotation from v7_invalidate_l1 ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation ARM: imx6q: resume PL310 only when CACHE_L2X0 defined ARM: imx6q: build pm code only when CONFIG_PM selected ARM: mx5: use generic irq chip pm interface for pm functions on ARM: omap: pass minimal SoC/board data for UART from dt arm/dts: Add minimal device tree support for omap2420 and omap2430 omap-serial: Add minimal device tree support omap-serial: Use default clock speed (48Mhz) if not specified omap-serial: Get rid of all pdev->id usage ARM: OMAP2+: hwmod: Add a new flag to handle hwmods left enabled at init ARM: OMAP4: PRM: use PRCM interrupt handler ARM: OMAP3: pm: use prcm chain handler ARM: OMAP: hwmod: add support for selecting mpu_irq for each wakeup pad ARM: OMAP2+: mux: add support for PAD wakeup interrupts ARM: OMAP: PRCM: add suspend prepare / finish support ARM: OMAP: PRCM: add support for chain interrupt handler ARM: OMAP3/4: PRM: add functions to read pending IRQs, PRM barrier ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup ARM: OMAP2+: mux: add wakeup-capable hwmod mux entries to dynamic list ...
120 lines
3.4 KiB
C
120 lines
3.4 KiB
C
/*
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* arch/arm/plat-omap/include/mach/serial.h
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*
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* Copyright (C) 2009 Texas Instruments
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* Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ASM_ARCH_SERIAL_H
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#define __ASM_ARCH_SERIAL_H
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#include <linux/init.h>
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/*
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* Memory entry used for the DEBUG_LL UART configuration, relative to
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* start of RAM. See also uncompress.h and debug-macro.S.
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*
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* Note that using a memory location for storing the UART configuration
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* has at least two limitations:
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*
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* 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
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* uncompress code could then partially overwrite itself
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* 2. We assume printascii is called at least once before paging_init,
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* and addruart has a chance to read OMAP_UART_INFO
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*/
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#define OMAP_UART_INFO_OFS 0x3ffc
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/* OMAP1 serial ports */
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#define OMAP1_UART1_BASE 0xfffb0000
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#define OMAP1_UART2_BASE 0xfffb0800
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#define OMAP1_UART3_BASE 0xfffb9800
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/* OMAP2 serial ports */
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#define OMAP2_UART1_BASE 0x4806a000
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#define OMAP2_UART2_BASE 0x4806c000
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#define OMAP2_UART3_BASE 0x4806e000
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/* OMAP3 serial ports */
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#define OMAP3_UART1_BASE OMAP2_UART1_BASE
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#define OMAP3_UART2_BASE OMAP2_UART2_BASE
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#define OMAP3_UART3_BASE 0x49020000
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#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
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#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
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/* OMAP4 serial ports */
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#define OMAP4_UART1_BASE OMAP2_UART1_BASE
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#define OMAP4_UART2_BASE OMAP2_UART2_BASE
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#define OMAP4_UART3_BASE 0x48020000
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#define OMAP4_UART4_BASE 0x4806e000
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/* TI81XX serial ports */
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#define TI81XX_UART1_BASE 0x48020000
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#define TI81XX_UART2_BASE 0x48022000
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#define TI81XX_UART3_BASE 0x48024000
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/* AM3505/3517 UART4 */
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#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
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/* External port on Zoom2/3 */
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#define ZOOM_UART_BASE 0x10000000
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#define ZOOM_UART_VIRT 0xfa400000
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#define OMAP_PORT_SHIFT 2
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#define OMAP7XX_PORT_SHIFT 0
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#define ZOOM_PORT_SHIFT 1
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#define OMAP1510_BASE_BAUD (12000000/16)
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#define OMAP16XX_BASE_BAUD (48000000/16)
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#define OMAP24XX_BASE_BAUD (48000000/16)
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/*
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* DEBUG_LL port encoding stored into the UART1 scratchpad register by
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* decomp_setup in uncompress.h
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*/
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#define OMAP1UART1 11
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#define OMAP1UART2 12
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#define OMAP1UART3 13
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#define OMAP2UART1 21
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#define OMAP2UART2 22
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#define OMAP2UART3 23
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#define OMAP3UART1 OMAP2UART1
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#define OMAP3UART2 OMAP2UART2
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#define OMAP3UART3 33
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#define OMAP3UART4 34 /* Only on 36xx */
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#define OMAP4UART1 OMAP2UART1
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#define OMAP4UART2 OMAP2UART2
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#define OMAP4UART3 43
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#define OMAP4UART4 44
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#define TI81XXUART1 81
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#define TI81XXUART2 82
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#define TI81XXUART3 83
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#define ZOOM_UART 95 /* Only on zoom2/3 */
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/* This is only used by 8250.c for omap1510 */
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#define is_omap_port(pt) ({int __ret = 0; \
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if ((pt)->port.mapbase == OMAP1_UART1_BASE || \
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(pt)->port.mapbase == OMAP1_UART2_BASE || \
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(pt)->port.mapbase == OMAP1_UART3_BASE) \
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__ret = 1; \
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__ret; \
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})
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#ifndef __ASSEMBLER__
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struct omap_board_data;
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struct omap_uart_port_info;
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extern void omap_serial_init(void);
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extern int omap_uart_can_sleep(void);
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extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
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extern void omap_serial_init_port(struct omap_board_data *bdata,
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struct omap_uart_port_info *platform_data);
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#endif
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#endif
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