60f85019c6
Replace IDE_TFLAG_{IN|OUT}_* flags meaning to the taskfile register validity on
input/output by the IDE_VALID_* flags and introduce 4 symmetric 8-bit register
validity indicator subfields, 'valid.{input/output}.{tf|hob}', into the 'struct
ide_cmd' instead of using the 'tf_flags' field for that purpose (this field can
then be turned from 32-bit into 8-bit one).
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
308 lines
7.7 KiB
C
308 lines
7.7 KiB
C
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#include <linux/kernel.h>
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#include <linux/ide.h>
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#if defined(CONFIG_ARM) || defined(CONFIG_M68K) || defined(CONFIG_MIPS) || \
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defined(CONFIG_PARISC) || defined(CONFIG_PPC) || defined(CONFIG_SPARC)
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#include <asm/ide.h>
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#else
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#include <asm-generic/ide_iops.h>
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#endif
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/*
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* Conventional PIO operations for ATA devices
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*/
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static u8 ide_inb(unsigned long port)
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{
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return (u8) inb(port);
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}
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static void ide_outb(u8 val, unsigned long port)
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{
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outb(val, port);
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}
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/*
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* MMIO operations, typically used for SATA controllers
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*/
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static u8 ide_mm_inb(unsigned long port)
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{
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return (u8) readb((void __iomem *) port);
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}
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static void ide_mm_outb(u8 value, unsigned long port)
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{
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writeb(value, (void __iomem *) port);
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}
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void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
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{
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
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else
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outb(cmd, hwif->io_ports.command_addr);
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}
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EXPORT_SYMBOL_GPL(ide_exec_command);
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u8 ide_read_status(ide_hwif_t *hwif)
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{
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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return readb((void __iomem *)hwif->io_ports.status_addr);
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else
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return inb(hwif->io_ports.status_addr);
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}
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EXPORT_SYMBOL_GPL(ide_read_status);
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u8 ide_read_altstatus(ide_hwif_t *hwif)
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{
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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return readb((void __iomem *)hwif->io_ports.ctl_addr);
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else
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return inb(hwif->io_ports.ctl_addr);
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}
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EXPORT_SYMBOL_GPL(ide_read_altstatus);
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void ide_write_devctl(ide_hwif_t *hwif, u8 ctl)
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{
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
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else
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outb(ctl, hwif->io_ports.ctl_addr);
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}
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EXPORT_SYMBOL_GPL(ide_write_devctl);
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void ide_dev_select(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = drive->hwif;
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u8 select = drive->select | ATA_DEVICE_OBS;
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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writeb(select, (void __iomem *)hwif->io_ports.device_addr);
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else
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outb(select, hwif->io_ports.device_addr);
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}
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EXPORT_SYMBOL_GPL(ide_dev_select);
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void ide_tf_load(ide_drive_t *drive, struct ide_cmd *cmd)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_io_ports *io_ports = &hwif->io_ports;
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struct ide_taskfile *tf = &cmd->tf;
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void (*tf_outb)(u8 addr, unsigned long port);
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u8 valid = cmd->valid.out.hob;
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u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
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u8 HIHI = (cmd->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
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if (mmio)
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tf_outb = ide_mm_outb;
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else
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tf_outb = ide_outb;
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if (cmd->ftf_flags & IDE_FTFLAG_FLAGGED)
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HIHI = 0xFF;
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if (valid & IDE_VALID_FEATURE)
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tf_outb(tf->hob_feature, io_ports->feature_addr);
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if (valid & IDE_VALID_NSECT)
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tf_outb(tf->hob_nsect, io_ports->nsect_addr);
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if (valid & IDE_VALID_LBAL)
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tf_outb(tf->hob_lbal, io_ports->lbal_addr);
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if (valid & IDE_VALID_LBAM)
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tf_outb(tf->hob_lbam, io_ports->lbam_addr);
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if (valid & IDE_VALID_LBAH)
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tf_outb(tf->hob_lbah, io_ports->lbah_addr);
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valid = cmd->valid.out.tf;
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if (valid & IDE_VALID_FEATURE)
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tf_outb(tf->feature, io_ports->feature_addr);
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if (valid & IDE_VALID_NSECT)
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tf_outb(tf->nsect, io_ports->nsect_addr);
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if (valid & IDE_VALID_LBAL)
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tf_outb(tf->lbal, io_ports->lbal_addr);
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if (valid & IDE_VALID_LBAM)
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tf_outb(tf->lbam, io_ports->lbam_addr);
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if (valid & IDE_VALID_LBAH)
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tf_outb(tf->lbah, io_ports->lbah_addr);
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if (valid & IDE_VALID_DEVICE)
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tf_outb((tf->device & HIHI) | drive->select,
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io_ports->device_addr);
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}
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EXPORT_SYMBOL_GPL(ide_tf_load);
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void ide_tf_read(ide_drive_t *drive, struct ide_cmd *cmd)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_io_ports *io_ports = &hwif->io_ports;
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struct ide_taskfile *tf = &cmd->tf;
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void (*tf_outb)(u8 addr, unsigned long port);
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u8 (*tf_inb)(unsigned long port);
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u8 valid = cmd->valid.in.tf;
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u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
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if (mmio) {
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tf_outb = ide_mm_outb;
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tf_inb = ide_mm_inb;
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} else {
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tf_outb = ide_outb;
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tf_inb = ide_inb;
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}
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/* be sure we're looking at the low order bits */
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tf_outb(ATA_DEVCTL_OBS, io_ports->ctl_addr);
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if (valid & IDE_VALID_ERROR)
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tf->error = tf_inb(io_ports->feature_addr);
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if (valid & IDE_VALID_NSECT)
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tf->nsect = tf_inb(io_ports->nsect_addr);
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if (valid & IDE_VALID_LBAL)
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tf->lbal = tf_inb(io_ports->lbal_addr);
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if (valid & IDE_VALID_LBAM)
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tf->lbam = tf_inb(io_ports->lbam_addr);
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if (valid & IDE_VALID_LBAH)
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tf->lbah = tf_inb(io_ports->lbah_addr);
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if (valid & IDE_VALID_DEVICE)
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tf->device = tf_inb(io_ports->device_addr);
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if (cmd->tf_flags & IDE_TFLAG_LBA48) {
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tf_outb(ATA_HOB | ATA_DEVCTL_OBS, io_ports->ctl_addr);
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valid = cmd->valid.in.hob;
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if (valid & IDE_VALID_ERROR)
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tf->hob_error = tf_inb(io_ports->feature_addr);
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if (valid & IDE_VALID_NSECT)
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tf->hob_nsect = tf_inb(io_ports->nsect_addr);
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if (valid & IDE_VALID_LBAL)
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tf->hob_lbal = tf_inb(io_ports->lbal_addr);
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if (valid & IDE_VALID_LBAM)
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tf->hob_lbam = tf_inb(io_ports->lbam_addr);
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if (valid & IDE_VALID_LBAH)
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tf->hob_lbah = tf_inb(io_ports->lbah_addr);
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}
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}
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EXPORT_SYMBOL_GPL(ide_tf_read);
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/*
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* Some localbus EIDE interfaces require a special access sequence
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* when using 32-bit I/O instructions to transfer data. We call this
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* the "vlb_sync" sequence, which consists of three successive reads
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* of the sector count register location, with interrupts disabled
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* to ensure that the reads all happen together.
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*/
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static void ata_vlb_sync(unsigned long port)
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{
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(void)inb(port);
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(void)inb(port);
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(void)inb(port);
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}
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/*
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* This is used for most PIO data transfers *from* the IDE interface
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*
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* These routines will round up any request for an odd number of bytes,
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* so if an odd len is specified, be sure that there's at least one
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* extra byte allocated for the buffer.
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*/
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void ide_input_data(ide_drive_t *drive, struct ide_cmd *cmd, void *buf,
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unsigned int len)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_io_ports *io_ports = &hwif->io_ports;
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unsigned long data_addr = io_ports->data_addr;
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unsigned int words = (len + 1) >> 1;
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u8 io_32bit = drive->io_32bit;
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u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
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if (io_32bit) {
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unsigned long uninitialized_var(flags);
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if ((io_32bit & 2) && !mmio) {
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local_irq_save(flags);
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ata_vlb_sync(io_ports->nsect_addr);
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}
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words >>= 1;
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if (mmio)
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__ide_mm_insl((void __iomem *)data_addr, buf, words);
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else
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insl(data_addr, buf, words);
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if ((io_32bit & 2) && !mmio)
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local_irq_restore(flags);
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if (((len + 1) & 3) < 2)
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return;
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buf += len & ~3;
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words = 1;
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}
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if (mmio)
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__ide_mm_insw((void __iomem *)data_addr, buf, words);
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else
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insw(data_addr, buf, words);
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}
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EXPORT_SYMBOL_GPL(ide_input_data);
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/*
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* This is used for most PIO data transfers *to* the IDE interface
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*/
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void ide_output_data(ide_drive_t *drive, struct ide_cmd *cmd, void *buf,
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unsigned int len)
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{
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ide_hwif_t *hwif = drive->hwif;
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struct ide_io_ports *io_ports = &hwif->io_ports;
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unsigned long data_addr = io_ports->data_addr;
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unsigned int words = (len + 1) >> 1;
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u8 io_32bit = drive->io_32bit;
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u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
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if (io_32bit) {
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unsigned long uninitialized_var(flags);
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if ((io_32bit & 2) && !mmio) {
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local_irq_save(flags);
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ata_vlb_sync(io_ports->nsect_addr);
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}
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words >>= 1;
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if (mmio)
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__ide_mm_outsl((void __iomem *)data_addr, buf, words);
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else
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outsl(data_addr, buf, words);
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if ((io_32bit & 2) && !mmio)
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local_irq_restore(flags);
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if (((len + 1) & 3) < 2)
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return;
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buf += len & ~3;
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words = 1;
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}
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if (mmio)
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__ide_mm_outsw((void __iomem *)data_addr, buf, words);
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else
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outsw(data_addr, buf, words);
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}
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EXPORT_SYMBOL_GPL(ide_output_data);
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const struct ide_tp_ops default_tp_ops = {
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.exec_command = ide_exec_command,
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.read_status = ide_read_status,
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.read_altstatus = ide_read_altstatus,
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.write_devctl = ide_write_devctl,
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.dev_select = ide_dev_select,
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.tf_load = ide_tf_load,
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.tf_read = ide_tf_read,
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.input_data = ide_input_data,
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.output_data = ide_output_data,
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};
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