bcc5fd49a0
Newer SoCs have two different AHB interconnect. The AHB 32 bits Matrix interconnect (h32mx) has a clock that can be setup at the half of the h64mx clock (which is mck). The h32mx clock can not exceed 90 MHz. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
13 lines
364 B
Makefile
13 lines
364 B
Makefile
#
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# Makefile for at91 specific clk
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#
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obj-y += pmc.o sckc.o
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obj-y += clk-slow.o clk-main.o clk-pll.o clk-plldiv.o clk-master.o
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obj-y += clk-system.o clk-peripheral.o clk-programmable.o
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obj-$(CONFIG_HAVE_AT91_UTMI) += clk-utmi.o
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obj-$(CONFIG_HAVE_AT91_USB_CLK) += clk-usb.o
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obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o
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obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o
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