kernel-ark/drivers/hwspinlock/Kconfig
Benjamin Gaignard f24fcff1d2 hwspinlock: add STM32 hwspinlock device
This patch adds support of hardware semaphores for stm32mp1 SoC.
The hardware block provides 32 semaphores.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2018-12-05 12:45:21 -08:00

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# SPDX-License-Identifier: GPL-2.0
#
# Generic HWSPINLOCK framework
#
menuconfig HWSPINLOCK
bool "Hardware Spinlock drivers"
config HWSPINLOCK_OMAP
tristate "OMAP Hardware Spinlock device"
depends on HWSPINLOCK
depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX
help
Say y here to support the OMAP Hardware Spinlock device (firstly
introduced in OMAP4).
If unsure, say N.
config HWSPINLOCK_QCOM
tristate "Qualcomm Hardware Spinlock device"
depends on HWSPINLOCK
depends on ARCH_QCOM
select MFD_SYSCON
help
Say y here to support the Qualcomm Hardware Mutex functionality, which
provides a synchronisation mechanism for the various processors on
the SoC.
If unsure, say N.
config HWSPINLOCK_SIRF
tristate "SIRF Hardware Spinlock device"
depends on HWSPINLOCK
depends on ARCH_SIRF
help
Say y here to support the SIRF Hardware Spinlock device, which
provides a synchronisation mechanism for the various processors
on the SoC.
It's safe to say n here if you're not interested in SIRF hardware
spinlock or just want a bare minimum kernel.
config HWSPINLOCK_SPRD
tristate "SPRD Hardware Spinlock device"
depends on ARCH_SPRD
depends on HWSPINLOCK
help
Say y here to support the SPRD Hardware Spinlock device.
If unsure, say N.
config HWSPINLOCK_STM32
tristate "STM32 Hardware Spinlock device"
depends on MACH_STM32MP157
depends on HWSPINLOCK
help
Say y here to support the STM32 Hardware Spinlock device.
If unsure, say N.
config HSEM_U8500
tristate "STE Hardware Semaphore functionality"
depends on HWSPINLOCK
depends on ARCH_U8500
help
Say y here to support the STE Hardware Semaphore functionality, which
provides a synchronisation mechanism for the various processor on the
SoC.
If unsure, say N.