e868d61272
Spelling fixes in arch/sh/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
94 lines
2.3 KiB
C
94 lines
2.3 KiB
C
/*
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* Interrupt handling for Simple external interrupt mask register
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*
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* Copyright (C) 2001 A&D Co., Ltd. <http://www.aandd.co.jp>
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*
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* This is for the machine which have single 16 bit register
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* for masking external IRQ individually.
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* Each bit of the register is for masking each interrupt.
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*
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* This file may be copied or modified under the terms of the GNU
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* General Public License. See linux/COPYING for more information.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/system.h>
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#include <asm/io.h>
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/* address of external interrupt mask register */
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unsigned long irq_mask_register;
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/* forward declaration */
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static unsigned int startup_maskreg_irq(unsigned int irq);
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static void shutdown_maskreg_irq(unsigned int irq);
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static void enable_maskreg_irq(unsigned int irq);
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static void disable_maskreg_irq(unsigned int irq);
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static void mask_and_ack_maskreg(unsigned int);
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static void end_maskreg_irq(unsigned int irq);
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/* hw_interrupt_type */
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static struct hw_interrupt_type maskreg_irq_type = {
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.typename = "Mask Register",
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.startup = startup_maskreg_irq,
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.shutdown = shutdown_maskreg_irq,
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.enable = enable_maskreg_irq,
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.disable = disable_maskreg_irq,
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.ack = mask_and_ack_maskreg,
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.end = end_maskreg_irq
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};
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/* actual implementation */
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static unsigned int startup_maskreg_irq(unsigned int irq)
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{
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enable_maskreg_irq(irq);
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return 0; /* never anything pending */
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}
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static void shutdown_maskreg_irq(unsigned int irq)
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{
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disable_maskreg_irq(irq);
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}
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static void disable_maskreg_irq(unsigned int irq)
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{
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unsigned short val, mask = 0x01 << irq;
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BUG_ON(!irq_mask_register);
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/* Set "irq"th bit */
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val = ctrl_inw(irq_mask_register);
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val |= mask;
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ctrl_outw(val, irq_mask_register);
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}
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static void enable_maskreg_irq(unsigned int irq)
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{
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unsigned short val, mask = ~(0x01 << irq);
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BUG_ON(!irq_mask_register);
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/* Clear "irq"th bit */
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val = ctrl_inw(irq_mask_register);
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val &= mask;
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ctrl_outw(val, irq_mask_register);
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}
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static void mask_and_ack_maskreg(unsigned int irq)
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{
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disable_maskreg_irq(irq);
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}
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static void end_maskreg_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_maskreg_irq(irq);
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}
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void make_maskreg_irq(unsigned int irq)
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{
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disable_irq_nosync(irq);
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irq_desc[irq].handler = &maskreg_irq_type;
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disable_maskreg_irq(irq);
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}
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