1518c17ab7
Use pci_pcie_cap() instead of pci_find_capability() to get PCIe capability offset in pciehp driver. This avoids unnecessary search in PCI configuration space. This patch also removes 'cap_base' field in struct controller, that was used to hold PCIe capability offset by pciehp itself. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
195 lines
6.6 KiB
C
195 lines
6.6 KiB
C
/*
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* PCI Express Hot Plug Controller Driver
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*
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* Copyright (C) 1995,2001 Compaq Computer Corporation
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* Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
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* Copyright (C) 2001 IBM Corp.
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* Copyright (C) 2003-2004 Intel Corporation
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
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*
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*/
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#ifndef _PCIEHP_H
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#define _PCIEHP_H
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/pci_hotplug.h>
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#include <linux/delay.h>
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#include <linux/sched.h> /* signal_pending() */
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#include <linux/pcieport_if.h>
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#include <linux/mutex.h>
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#define MY_NAME "pciehp"
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extern int pciehp_poll_mode;
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extern int pciehp_poll_time;
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extern int pciehp_debug;
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extern int pciehp_force;
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extern struct workqueue_struct *pciehp_wq;
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#define dbg(format, arg...) \
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do { \
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if (pciehp_debug) \
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printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); \
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} while (0)
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#define err(format, arg...) \
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printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
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#define info(format, arg...) \
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printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
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#define warn(format, arg...) \
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printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
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#define ctrl_dbg(ctrl, format, arg...) \
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do { \
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if (pciehp_debug) \
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dev_printk(KERN_DEBUG, &ctrl->pcie->device, \
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format, ## arg); \
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} while (0)
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#define ctrl_err(ctrl, format, arg...) \
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dev_err(&ctrl->pcie->device, format, ## arg)
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#define ctrl_info(ctrl, format, arg...) \
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dev_info(&ctrl->pcie->device, format, ## arg)
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#define ctrl_warn(ctrl, format, arg...) \
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dev_warn(&ctrl->pcie->device, format, ## arg)
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#define SLOT_NAME_SIZE 10
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struct slot {
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u8 state;
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struct controller *ctrl;
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struct hotplug_slot *hotplug_slot;
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struct delayed_work work; /* work for button event */
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struct mutex lock;
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};
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struct event_info {
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u32 event_type;
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struct slot *p_slot;
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struct work_struct work;
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};
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struct controller {
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struct mutex ctrl_lock; /* controller lock */
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struct pcie_device *pcie; /* PCI Express port service */
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struct slot *slot;
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wait_queue_head_t queue; /* sleep & wake process */
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u32 slot_cap;
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struct timer_list poll_timer;
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unsigned int cmd_busy:1;
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unsigned int no_cmd_complete:1;
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unsigned int link_active_reporting:1;
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unsigned int notification_enabled:1;
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unsigned int power_fault_detected;
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};
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#define INT_BUTTON_IGNORE 0
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#define INT_PRESENCE_ON 1
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#define INT_PRESENCE_OFF 2
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#define INT_SWITCH_CLOSE 3
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#define INT_SWITCH_OPEN 4
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#define INT_POWER_FAULT 5
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#define INT_POWER_FAULT_CLEAR 6
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#define INT_BUTTON_PRESS 7
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#define INT_BUTTON_RELEASE 8
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#define INT_BUTTON_CANCEL 9
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#define STATIC_STATE 0
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#define BLINKINGON_STATE 1
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#define BLINKINGOFF_STATE 2
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#define POWERON_STATE 3
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#define POWEROFF_STATE 4
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#define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
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#define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
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#define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
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#define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
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#define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
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#define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS)
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#define EMI(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP)
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#define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
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#define PSN(ctrl) ((ctrl)->slot_cap >> 19)
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extern int pciehp_sysfs_enable_slot(struct slot *slot);
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extern int pciehp_sysfs_disable_slot(struct slot *slot);
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extern u8 pciehp_handle_attention_button(struct slot *p_slot);
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extern u8 pciehp_handle_switch_change(struct slot *p_slot);
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extern u8 pciehp_handle_presence_change(struct slot *p_slot);
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extern u8 pciehp_handle_power_fault(struct slot *p_slot);
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extern int pciehp_configure_device(struct slot *p_slot);
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extern int pciehp_unconfigure_device(struct slot *p_slot);
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extern void pciehp_queue_pushbutton_work(struct work_struct *work);
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struct controller *pcie_init(struct pcie_device *dev);
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int pcie_init_notification(struct controller *ctrl);
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int pciehp_enable_slot(struct slot *p_slot);
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int pciehp_disable_slot(struct slot *p_slot);
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int pcie_enable_notification(struct controller *ctrl);
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int pciehp_power_on_slot(struct slot *slot);
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int pciehp_power_off_slot(struct slot *slot);
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int pciehp_get_power_status(struct slot *slot, u8 *status);
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int pciehp_get_attention_status(struct slot *slot, u8 *status);
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int pciehp_set_attention_status(struct slot *slot, u8 status);
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int pciehp_get_latch_status(struct slot *slot, u8 *status);
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int pciehp_get_adapter_status(struct slot *slot, u8 *status);
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int pciehp_get_max_link_speed(struct slot *slot, enum pci_bus_speed *speed);
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int pciehp_get_max_link_width(struct slot *slot, enum pcie_link_width *val);
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int pciehp_get_cur_link_speed(struct slot *slot, enum pci_bus_speed *speed);
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int pciehp_get_cur_link_width(struct slot *slot, enum pcie_link_width *val);
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int pciehp_query_power_fault(struct slot *slot);
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void pciehp_green_led_on(struct slot *slot);
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void pciehp_green_led_off(struct slot *slot);
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void pciehp_green_led_blink(struct slot *slot);
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int pciehp_check_link_status(struct controller *ctrl);
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void pciehp_release_ctrl(struct controller *ctrl);
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static inline const char *slot_name(struct slot *slot)
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{
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return hotplug_slot_name(slot->hotplug_slot);
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}
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#ifdef CONFIG_ACPI
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#include <acpi/acpi.h>
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#include <acpi/acpi_bus.h>
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#include <linux/pci-acpi.h>
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extern void __init pciehp_acpi_slot_detection_init(void);
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extern int pciehp_acpi_slot_detection_check(struct pci_dev *dev);
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static inline void pciehp_firmware_init(void)
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{
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pciehp_acpi_slot_detection_init();
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}
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static inline int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev)
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{
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int retval;
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u32 flags = (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL |
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OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
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retval = acpi_get_hp_hw_control_from_firmware(dev, flags);
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if (retval)
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return retval;
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return pciehp_acpi_slot_detection_check(dev);
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}
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#else
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#define pciehp_firmware_init() do {} while (0)
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#define pciehp_get_hp_hw_control_from_firmware(dev) 0
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#endif /* CONFIG_ACPI */
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#endif /* _PCIEHP_H */
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