Russell King 505d7b1931 [ARM SMP] Ensure secondary CPUs have a clean TLB ... Since ARMv6 CPUs will not flush the TLB on context switches, it is possible that we may end up with some global TLB entries remaining present, eventually upsetting userspace. Explicitly flush the entire TLB on secondary CPUs as they startup, after we have switched to the init_mm page tables. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2005-07-28 20:32:47 +01:00
..
alpha	[PATCH] new alpha syscalls	2005-07-27 18:24:24 -07:00
arm	[ARM SMP] Ensure secondary CPUs have a clean TLB	2005-07-28 20:32:47 +01:00
arm26
cris	[PATCH] CRIS update: new subarchitecture v32	2005-07-27 16:26:01 -07:00
frv
h8300
i386	[PATCH] sys_get_thread_area does not clear the returned argument	2005-07-27 16:26:08 -07:00
ia64
m32r
m68k
m68knommu
mips
parisc
ppc	[PATCH] ppc32: 8xx remove BROKEN Kconfig entry	2005-07-27 16:35:39 -07:00
ppc64	[PATCH] turn many #if $undefined_string into #ifdef $undefined_string	2005-07-27 16:26:08 -07:00
s390	[PATCH] s390: cpu timer reset in machine check handler	2005-07-27 16:26:05 -07:00
sh
sh64
sparc
sparc64
um	[PATCH] turn many #if $undefined_string into #ifdef $undefined_string	2005-07-27 16:26:08 -07:00
v850	[PATCH] v850: Update PCI support	2005-07-27 16:26:03 -07:00
x86_64	[PATCH] turn many #if $undefined_string into #ifdef $undefined_string	2005-07-27 16:26:08 -07:00
xtensa