Fixup poll values for MC and PCI. Also make mc function names unique to mc. Signed-off-by: Dave Jiang <djiang@mvista.com> Signed-off-by: Douglas Thompson <dougthompson@xmissin.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
625 lines
16 KiB
C
625 lines
16 KiB
C
/*
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* (C) 2005, 2006 Linux Networx (http://lnxi.com)
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* This file may be distributed under the terms of the
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* GNU General Public License.
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*
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* Written Doug Thompson <norsk5@xmission.com>
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*
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*/
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#include <linux/module.h>
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#include <linux/sysdev.h>
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#include <linux/ctype.h>
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#include "edac_core.h"
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#include "edac_module.h"
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#ifdef CONFIG_PCI
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#define EDAC_PCI_SYMLINK "device"
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static int check_pci_errors = 0; /* default YES check PCI parity */
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static int edac_pci_panic_on_pe = 0; /* default no panic on PCI Parity */
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static int edac_pci_log_pe = 1; /* log PCI parity errors */
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static int edac_pci_log_npe = 1; /* log PCI non-parity error errors */
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static atomic_t pci_parity_count = ATOMIC_INIT(0);
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static atomic_t pci_nonparity_count = ATOMIC_INIT(0);
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static int edac_pci_poll_msec = 1000;
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static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */
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static struct completion edac_pci_kobj_complete;
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static atomic_t edac_pci_sysfs_refcount = ATOMIC_INIT(0);
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int edac_pci_get_check_errors(void)
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{
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return check_pci_errors;
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}
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int edac_pci_get_log_pe(void)
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{
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return edac_pci_log_pe;
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}
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int edac_pci_get_log_npe(void)
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{
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return edac_pci_log_npe;
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}
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int edac_pci_get_panic_on_pe(void)
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{
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return edac_pci_panic_on_pe;
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}
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int edac_pci_get_poll_msec(void)
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{
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return edac_pci_poll_msec;
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}
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/**************************** EDAC PCI sysfs instance *******************/
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static ssize_t instance_pe_count_show(struct edac_pci_ctl_info *pci, char *data)
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{
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return sprintf(data,"%u\n", atomic_read(&pci->counters.pe_count));
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}
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static ssize_t instance_npe_count_show(struct edac_pci_ctl_info *pci,
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char *data)
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{
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return sprintf(data,"%u\n", atomic_read(&pci->counters.npe_count));
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}
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#define to_instance(k) container_of(k, struct edac_pci_ctl_info, kobj)
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#define to_instance_attr(a) container_of(a, struct instance_attribute, attr)
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/* DEVICE instance kobject release() function */
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static void edac_pci_instance_release(struct kobject *kobj)
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{
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struct edac_pci_ctl_info *pci;
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debugf1("%s()\n", __func__);
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pci = to_instance(kobj);
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complete(&pci->kobj_complete);
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}
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/* instance specific attribute structure */
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struct instance_attribute {
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struct attribute attr;
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ssize_t (*show)(struct edac_pci_ctl_info *, char *);
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ssize_t (*store)(struct edac_pci_ctl_info *, const char *, size_t);
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};
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/* Function to 'show' fields from the edac_pci 'instance' structure */
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static ssize_t edac_pci_instance_show(struct kobject *kobj,
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struct attribute *attr,
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char *buffer)
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{
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struct edac_pci_ctl_info *pci = to_instance(kobj);
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struct instance_attribute *instance_attr = to_instance_attr(attr);
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if (instance_attr->show)
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return instance_attr->show(pci, buffer);
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return -EIO;
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}
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/* Function to 'store' fields into the edac_pci 'instance' structure */
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static ssize_t edac_pci_instance_store(struct kobject *kobj,
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struct attribute *attr,
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const char *buffer, size_t count)
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{
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struct edac_pci_ctl_info *pci = to_instance(kobj);
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struct instance_attribute *instance_attr = to_instance_attr(attr);
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if (instance_attr->store)
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return instance_attr->store(pci, buffer, count);
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return -EIO;
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}
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static struct sysfs_ops pci_instance_ops = {
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.show = edac_pci_instance_show,
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.store = edac_pci_instance_store
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};
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#define INSTANCE_ATTR(_name, _mode, _show, _store) \
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static struct instance_attribute attr_instance_##_name = { \
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.attr = {.name = __stringify(_name), .mode = _mode }, \
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.show = _show, \
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.store = _store, \
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};
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INSTANCE_ATTR(pe_count, S_IRUGO, instance_pe_count_show, NULL);
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INSTANCE_ATTR(npe_count, S_IRUGO, instance_npe_count_show, NULL);
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/* pci instance attributes */
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static struct instance_attribute *pci_instance_attr[] = {
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&attr_instance_pe_count,
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&attr_instance_npe_count,
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NULL
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};
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/* the ktype for pci instance */
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static struct kobj_type ktype_pci_instance = {
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.release = edac_pci_instance_release,
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.sysfs_ops = &pci_instance_ops,
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.default_attrs = (struct attribute **)pci_instance_attr,
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};
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static int edac_pci_create_instance_kobj(struct edac_pci_ctl_info *pci, int idx)
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{
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int err;
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pci->kobj.parent = &edac_pci_kobj;
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pci->kobj.ktype = &ktype_pci_instance;
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err = kobject_set_name(&pci->kobj, "pci%d", idx);
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if (err)
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return err;
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err = kobject_register(&pci->kobj);
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if (err != 0) {
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debugf2("%s() failed to register instance pci%d\n",
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__func__, idx);
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return err;
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}
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debugf1("%s() Register instance 'pci%d' kobject\n", __func__, idx);
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return 0;
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}
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static void
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edac_pci_delete_instance_kobj(struct edac_pci_ctl_info *pci, int idx)
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{
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init_completion(&pci->kobj_complete);
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kobject_unregister(&pci->kobj);
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wait_for_completion(&pci->kobj_complete);
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}
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/***************************** EDAC PCI sysfs root **********************/
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#define to_edacpci(k) container_of(k, struct edac_pci_ctl_info, kobj)
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#define to_edacpci_attr(a) container_of(a, struct edac_pci_attr, attr)
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static ssize_t edac_pci_int_show(void *ptr, char *buffer)
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{
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int *value = ptr;
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return sprintf(buffer,"%d\n",*value);
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}
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static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
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{
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int *value = ptr;
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if (isdigit(*buffer))
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*value = simple_strtoul(buffer,NULL,0);
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return count;
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}
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struct edac_pci_dev_attribute {
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struct attribute attr;
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void *value;
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ssize_t (*show)(void *,char *);
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ssize_t (*store)(void *, const char *,size_t);
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};
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/* Set of show/store abstract level functions for PCI Parity object */
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static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
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char *buffer)
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{
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struct edac_pci_dev_attribute *edac_pci_dev;
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edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
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if (edac_pci_dev->show)
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return edac_pci_dev->show(edac_pci_dev->value, buffer);
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return -EIO;
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}
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static ssize_t edac_pci_dev_store(struct kobject *kobj,
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struct attribute *attr, const char *buffer, size_t count)
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{
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struct edac_pci_dev_attribute *edac_pci_dev;
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edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
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if (edac_pci_dev->show)
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return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
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return -EIO;
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}
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static struct sysfs_ops edac_pci_sysfs_ops = {
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.show = edac_pci_dev_show,
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.store = edac_pci_dev_store
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};
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#define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
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static struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
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.attr = {.name = __stringify(_name), .mode = _mode }, \
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.value = &_name, \
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.show = _show, \
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.store = _store, \
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};
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#define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
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static struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
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.attr = {.name = __stringify(_name), .mode = _mode }, \
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.value = _data, \
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.show = _show, \
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.store = _store, \
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};
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/* PCI Parity control files */
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EDAC_PCI_ATTR(check_pci_errors, S_IRUGO|S_IWUSR, edac_pci_int_show,
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edac_pci_int_store);
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EDAC_PCI_ATTR(edac_pci_log_pe, S_IRUGO|S_IWUSR, edac_pci_int_show,
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edac_pci_int_store);
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EDAC_PCI_ATTR(edac_pci_log_npe, S_IRUGO|S_IWUSR, edac_pci_int_show,
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edac_pci_int_store);
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EDAC_PCI_ATTR(edac_pci_panic_on_pe, S_IRUGO|S_IWUSR, edac_pci_int_show,
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edac_pci_int_store);
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EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
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EDAC_PCI_ATTR(pci_nonparity_count, S_IRUGO, edac_pci_int_show, NULL);
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/* Base Attributes of the memory ECC object */
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static struct edac_pci_dev_attribute *edac_pci_attr[] = {
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&edac_pci_attr_check_pci_errors,
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&edac_pci_attr_edac_pci_log_pe,
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&edac_pci_attr_edac_pci_log_npe,
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&edac_pci_attr_edac_pci_panic_on_pe,
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&edac_pci_attr_pci_parity_count,
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&edac_pci_attr_pci_nonparity_count,
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NULL,
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};
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/* No memory to release */
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static void edac_pci_release(struct kobject *kobj)
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{
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struct edac_pci_ctl_info *pci;
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pci = to_edacpci(kobj);
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debugf1("%s()\n", __func__);
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complete(&pci->kobj_complete);
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}
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static struct kobj_type ktype_edac_pci = {
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.release = edac_pci_release,
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.sysfs_ops = &edac_pci_sysfs_ops,
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.default_attrs = (struct attribute **) edac_pci_attr,
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};
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/**
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* edac_sysfs_pci_setup()
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*
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* setup the sysfs for EDAC PCI attributes
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* assumes edac_class has already been initialized
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*/
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int edac_pci_register_main_kobj(void)
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{
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int err;
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struct sysdev_class *edac_class;
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debugf1("%s()\n", __func__);
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edac_class = edac_get_edac_class();
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if (edac_class == NULL) {
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debugf1("%s() no edac_class\n", __func__);
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return -ENODEV;
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}
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edac_pci_kobj.ktype = &ktype_edac_pci;
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edac_pci_kobj.parent = &edac_class->kset.kobj;
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err = kobject_set_name(&edac_pci_kobj, "pci");
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if(err)
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return err;
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/* Instanstiate the pci object */
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/* FIXME: maybe new sysdev_create_subdir() */
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err = kobject_register(&edac_pci_kobj);
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if (err) {
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debugf1("Failed to register '.../edac/pci'\n");
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return err;
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}
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debugf1("Registered '.../edac/pci' kobject\n");
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return 0;
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}
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/*
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* edac_pci_unregister_main_kobj()
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*
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* perform the sysfs teardown for the PCI attributes
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*/
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void edac_pci_unregister_main_kobj(void)
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{
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debugf0("%s()\n", __func__);
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init_completion(&edac_pci_kobj_complete);
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kobject_unregister(&edac_pci_kobj);
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wait_for_completion(&edac_pci_kobj_complete);
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}
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int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci)
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{
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int err;
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struct kobject *edac_kobj = &pci->kobj;
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if (atomic_inc_return(&edac_pci_sysfs_refcount) == 1) {
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err = edac_pci_register_main_kobj();
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if (err) {
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atomic_dec(&edac_pci_sysfs_refcount);
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return err;
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}
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}
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err = edac_pci_create_instance_kobj(pci, pci->pci_idx);
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if (err) {
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if (atomic_dec_return(&edac_pci_sysfs_refcount) == 0)
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edac_pci_unregister_main_kobj();
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}
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debugf0("%s() idx=%d\n", __func__, pci->pci_idx);
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err = sysfs_create_link(edac_kobj,
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&pci->dev->kobj,
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EDAC_PCI_SYMLINK);
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if (err) {
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debugf0("%s() sysfs_create_link() returned err= %d\n",
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__func__, err);
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return err;
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}
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return 0;
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}
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void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci)
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{
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debugf0("%s()\n", __func__);
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edac_pci_delete_instance_kobj(pci, pci->pci_idx);
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sysfs_remove_link(&pci->kobj, EDAC_PCI_SYMLINK);
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if (atomic_dec_return(&edac_pci_sysfs_refcount) == 0)
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edac_pci_unregister_main_kobj();
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}
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/************************ PCI error handling *************************/
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static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
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{
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int where;
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u16 status;
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where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
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pci_read_config_word(dev, where, &status);
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/* If we get back 0xFFFF then we must suspect that the card has been
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* pulled but the Linux PCI layer has not yet finished cleaning up.
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* We don't want to report on such devices
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*/
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if (status == 0xFFFF) {
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u32 sanity;
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pci_read_config_dword(dev, 0, &sanity);
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if (sanity == 0xFFFFFFFF)
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return 0;
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}
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status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
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PCI_STATUS_PARITY;
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if (status)
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/* reset only the bits we are interested in */
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pci_write_config_word(dev, where, status);
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return status;
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}
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typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
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/* Clear any PCI parity errors logged by this device. */
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static void edac_pci_dev_parity_clear(struct pci_dev *dev)
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{
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u8 header_type;
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get_pci_parity_status(dev, 0);
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/* read the device TYPE, looking for bridges */
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pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
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get_pci_parity_status(dev, 1);
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}
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/*
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* PCI Parity polling
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*
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*/
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static void edac_pci_dev_parity_test(struct pci_dev *dev)
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{
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u16 status;
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u8 header_type;
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/* read the STATUS register on this device
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*/
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status = get_pci_parity_status(dev, 0);
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debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
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/* check the status reg for errors */
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if (status) {
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if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) {
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edac_printk(KERN_CRIT, EDAC_PCI,
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"Signaled System Error on %s\n",
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pci_name(dev));
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atomic_inc(&pci_nonparity_count);
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}
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if (status & (PCI_STATUS_PARITY)) {
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edac_printk(KERN_CRIT, EDAC_PCI,
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"Master Data Parity Error on %s\n",
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pci_name(dev));
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atomic_inc(&pci_parity_count);
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}
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if (status & (PCI_STATUS_DETECTED_PARITY)) {
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edac_printk(KERN_CRIT, EDAC_PCI,
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"Detected Parity Error on %s\n",
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pci_name(dev));
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atomic_inc(&pci_parity_count);
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}
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}
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/* read the device TYPE, looking for bridges */
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pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
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debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
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/* On bridges, need to examine secondary status register */
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status = get_pci_parity_status(dev, 1);
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debugf2("PCI SEC_STATUS= 0x%04x %s\n",
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status, dev->dev.bus_id );
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/* check the secondary status reg for errors */
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if (status) {
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if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) {
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edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
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"Signaled System Error on %s\n",
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pci_name(dev));
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atomic_inc(&pci_nonparity_count);
|
|
}
|
|
|
|
if (status & (PCI_STATUS_PARITY)) {
|
|
edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
|
|
"Master Data Parity Error on "
|
|
"%s\n", pci_name(dev));
|
|
|
|
atomic_inc(&pci_parity_count);
|
|
}
|
|
|
|
if (status & (PCI_STATUS_DETECTED_PARITY)) {
|
|
edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
|
|
"Detected Parity Error on %s\n",
|
|
pci_name(dev));
|
|
|
|
atomic_inc(&pci_parity_count);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* pci_dev parity list iterator
|
|
* Scan the PCI device list for one iteration, looking for SERRORs
|
|
* Master Parity ERRORS or Parity ERRORs on primary or secondary devices
|
|
*/
|
|
static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
|
|
{
|
|
struct pci_dev *dev = NULL;
|
|
|
|
/* request for kernel access to the next PCI device, if any,
|
|
* and while we are looking at it have its reference count
|
|
* bumped until we are done with it
|
|
*/
|
|
while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
|
|
fn(dev);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* edac_pci_do_parity_check
|
|
*
|
|
* performs the actual PCI parity check operation
|
|
*/
|
|
void edac_pci_do_parity_check(void)
|
|
{
|
|
unsigned long flags;
|
|
int before_count;
|
|
|
|
debugf3("%s()\n", __func__);
|
|
|
|
if (!check_pci_errors)
|
|
return;
|
|
|
|
before_count = atomic_read(&pci_parity_count);
|
|
|
|
/* scan all PCI devices looking for a Parity Error on devices and
|
|
* bridges
|
|
*/
|
|
local_irq_save(flags);
|
|
edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
|
|
local_irq_restore(flags);
|
|
|
|
/* Only if operator has selected panic on PCI Error */
|
|
if (edac_pci_get_panic_on_pe()) {
|
|
/* If the count is different 'after' from 'before' */
|
|
if (before_count != atomic_read(&pci_parity_count))
|
|
panic("EDAC: PCI Parity Error");
|
|
}
|
|
}
|
|
|
|
void edac_pci_clear_parity_errors(void)
|
|
{
|
|
/* Clear any PCI bus parity errors that devices initially have logged
|
|
* in their registers.
|
|
*/
|
|
edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
|
|
}
|
|
void edac_pci_handle_pe(struct edac_pci_ctl_info *pci, const char *msg)
|
|
{
|
|
|
|
/* global PE counter incremented by edac_pci_do_parity_check() */
|
|
atomic_inc(&pci->counters.pe_count);
|
|
|
|
if (edac_pci_get_log_pe())
|
|
edac_pci_printk(pci, KERN_WARNING,
|
|
"Parity Error ctl: %s %d: %s\n",
|
|
pci->ctl_name, pci->pci_idx, msg);
|
|
|
|
/*
|
|
* poke all PCI devices and see which one is the troublemaker
|
|
* panic() is called if set
|
|
*/
|
|
edac_pci_do_parity_check();
|
|
}
|
|
EXPORT_SYMBOL_GPL(edac_pci_handle_pe);
|
|
|
|
void edac_pci_handle_npe(struct edac_pci_ctl_info *pci, const char *msg)
|
|
{
|
|
|
|
/* global NPE counter incremented by edac_pci_do_parity_check() */
|
|
atomic_inc(&pci->counters.npe_count);
|
|
|
|
if (edac_pci_get_log_npe())
|
|
edac_pci_printk(pci, KERN_WARNING,
|
|
"Non-Parity Error ctl: %s %d: %s\n",
|
|
pci->ctl_name, pci->pci_idx, msg);
|
|
|
|
/*
|
|
* poke all PCI devices and see which one is the troublemaker
|
|
* panic() is called if set
|
|
*/
|
|
edac_pci_do_parity_check();
|
|
}
|
|
EXPORT_SYMBOL_GPL(edac_pci_handle_npe);
|
|
|
|
/*
|
|
* Define the PCI parameter to the module
|
|
*/
|
|
module_param(check_pci_errors, int, 0644);
|
|
MODULE_PARM_DESC(check_pci_errors,
|
|
"Check for PCI bus parity errors: 0=off 1=on");
|
|
module_param(edac_pci_panic_on_pe, int, 0644);
|
|
MODULE_PARM_DESC(edac_pci_panic_on_pe,
|
|
"Panic on PCI Bus Parity error: 0=off 1=on");
|
|
|
|
#endif /* CONFIG_PCI */
|