a7726350e0
Here is a collection of cleanup patches. Among the pieces that stand out are:
- The deletion of h720x platforms
- Split of at91 non-dt platforms to their own Kconfig file to keep them separate
- General cleanups and refactoring of i.MX and MXS platforms
- Some restructuring of clock tables for OMAP
- Convertion of PMC driver for Tegra to dt-only
- Some renames of sunxi -> sun4i (Allwinner A10)
- ... plus a bunch of other stuff that I haven't mentioned
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRggUqAAoJEIwa5zzehBx3HjEQAJwp7heRs/HwTDzmzcyHkRMV
usbaa9dHBuAZ0DzsWjLK99xEn8VWD9TvbeP6hN5gNhxko06UVza3o8PI2iV1ztMB
9K3u2+LS5on/5cOxnsU1va16h5hBZ0ZIgNx5NY+PZ5mBY6v1U3qTjljPP62iXp63
w+sdXeZDe/c5JvuoDRbY0OBR++3Jp8cQg7KbU78jWz3r5D2rC1zwhkf2audcRY6b
jIWTj9M8CHynh/D6OzKqDcOYorBHNSRj0YbiWS2nnMfm+0V8nya00EPRpCPRiBUb
sobSy1CI9Qxiih3bOf6QCfzCRzJ5hbtE0zlI8g3bqtEZ1yOsE949HrKapWHJJdIU
JNTXrxXORAnaRhbzvSPNpp/iJBSDQRsfEETgv5BuHg/4lzTQfzElySbcgb4EeoHr
7Zt8ZR2/Du+u76qIPqs19ES3Wx+nOEOfSDAgZmlfPvlwmlGDYvqAXoeJ006VXnhG
JacLuD/cFnJ1w00Bcl48ZXMIsVkoRqjvsCG5q688HGXMM1lU8DfgUpQY6OCWAbdu
kFnBinJZk+HbE8FGS8O0BoQ+oiC0YIr2XhATL66PGHq7bLHb5ycwvZ7mrfC0AN9j
M9hqTFednwfo9wF8vSj5nMsxXwP8/mky4ECGoFvLsMYDosunrNVnAHtTgDSE+ZgO
6kQJ1P8jBBXn2LyjF88W
=xCAx
-----END PGP SIGNATURE-----
Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanup from Olof Johansson:
"Here is a collection of cleanup patches. Among the pieces that stand
out are:
- The deletion of h720x platforms
- Split of at91 non-dt platforms to their own Kconfig file to keep
them separate
- General cleanups and refactoring of i.MX and MXS platforms
- Some restructuring of clock tables for OMAP
- Convertion of PMC driver for Tegra to dt-only
- Some renames of sunxi -> sun4i (Allwinner A10)
- ... plus a bunch of other stuff that I haven't mentioned"
* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits)
ARM: i.MX: remove unused ARCH_* configs
ARM i.MX53: remove platform ahci support
ARM: sunxi: Rework the restart code
irqchip: sunxi: Rename sunxi to sun4i
irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
clocksource: sunxi: Rename sunxi to sun4i
clocksource: sunxi: make use of CLKSRC_OF
clocksource: sunxi: Cleanup the timer code
ARM: at91: remove trailing semicolon from macros
ARM: at91/setup: fix trivial typos
ARM: EXYNOS: remove "config EXYNOS_DEV_DRM"
ARM: EXYNOS: change the name of USB ohci header
ARM: SAMSUNG: Remove unnecessary code for dma
ARM: S3C24XX: Remove unused GPIO drive strength register definitions
ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method
ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412
ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410
ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards
ARM: SAMSUNG: Fix typo "CONFIG_SAMSUNG_DEV_RTC"
ARM: S5P64X0: Fix typo "CONFIG_S5P64X0_SETUP_SDHCI"
...
106 lines
3.0 KiB
C
106 lines
3.0 KiB
C
/*
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* Interrupt routines for Gemini
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*
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* Copyright (C) 2001-2006 Storlink, Corp.
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* Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/stddef.h>
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#include <linux/list.h>
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#include <linux/sched.h>
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#include <linux/cpu.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <asm/system_misc.h>
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#include <mach/hardware.h>
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#define IRQ_SOURCE(base_addr) (base_addr + 0x00)
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#define IRQ_MASK(base_addr) (base_addr + 0x04)
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#define IRQ_CLEAR(base_addr) (base_addr + 0x08)
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#define IRQ_TMODE(base_addr) (base_addr + 0x0C)
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#define IRQ_TLEVEL(base_addr) (base_addr + 0x10)
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#define IRQ_STATUS(base_addr) (base_addr + 0x14)
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#define FIQ_SOURCE(base_addr) (base_addr + 0x20)
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#define FIQ_MASK(base_addr) (base_addr + 0x24)
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#define FIQ_CLEAR(base_addr) (base_addr + 0x28)
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#define FIQ_TMODE(base_addr) (base_addr + 0x2C)
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#define FIQ_LEVEL(base_addr) (base_addr + 0x30)
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#define FIQ_STATUS(base_addr) (base_addr + 0x34)
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static void gemini_ack_irq(struct irq_data *d)
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{
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__raw_writel(1 << d->irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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}
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static void gemini_mask_irq(struct irq_data *d)
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{
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unsigned int mask;
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mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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mask &= ~(1 << d->irq);
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__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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}
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static void gemini_unmask_irq(struct irq_data *d)
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{
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unsigned int mask;
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mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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mask |= (1 << d->irq);
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__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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}
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static struct irq_chip gemini_irq_chip = {
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.name = "INTC",
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.irq_ack = gemini_ack_irq,
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.irq_mask = gemini_mask_irq,
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.irq_unmask = gemini_unmask_irq,
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};
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static struct resource irq_resource = {
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.name = "irq_handler",
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.start = GEMINI_INTERRUPT_BASE,
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.end = FIQ_STATUS(GEMINI_INTERRUPT_BASE) + 4,
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};
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void __init gemini_init_irq(void)
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{
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unsigned int i, mode = 0, level = 0;
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/*
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* Disable the idle handler by default since it is buggy
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* For more info see arch/arm/mach-gemini/idle.c
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*/
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cpu_idle_poll_ctrl(true);
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request_resource(&iomem_resource, &irq_resource);
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for (i = 0; i < NR_IRQS; i++) {
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irq_set_chip(i, &gemini_irq_chip);
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if((i >= IRQ_TIMER1 && i <= IRQ_TIMER3) || (i >= IRQ_SERIRQ0 && i <= IRQ_SERIRQ1)) {
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irq_set_handler(i, handle_edge_irq);
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mode |= 1 << i;
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level |= 1 << i;
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} else {
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irq_set_handler(i, handle_level_irq);
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}
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set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
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}
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/* Disable all interrupts */
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__raw_writel(0, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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__raw_writel(0, FIQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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/* Set interrupt mode */
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__raw_writel(mode, IRQ_TMODE(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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__raw_writel(level, IRQ_TLEVEL(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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}
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