64f930361b
UTF-8 for copyright symbols etc included. Typedefs and anything else which would cause actual code changes skipped. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
485 lines
15 KiB
C
485 lines
15 KiB
C
/*
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* Agere Systems Inc.
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* 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
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*
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
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* http://www.agere.com
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*
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*------------------------------------------------------------------------------
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*
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* et131x_isr.c - File which contains the ISR, ISR handler, and related routines
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* for processing interrupts from the device.
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*
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*------------------------------------------------------------------------------
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*
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* SOFTWARE LICENSE
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*
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* This software is provided subject to the following terms and conditions,
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* which you should read carefully before using the software. Using this
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* software indicates your acceptance of these terms and conditions. If you do
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* not agree with these terms and conditions, do not use the software.
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*
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* Copyright © 2005 Agere Systems Inc.
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* All rights reserved.
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*
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* Redistribution and use in source or binary forms, with or without
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* modifications, are permitted provided that the following conditions are met:
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*
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* . Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following Disclaimer as comments in the code as
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* well as in the documentation and/or other materials provided with the
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* distribution.
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*
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* . Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following Disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* . Neither the name of Agere Systems Inc. nor the names of the contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* Disclaimer
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
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* USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
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* RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
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* DAMAGE.
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*
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*/
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#include "et131x_version.h"
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#include "et131x_debug.h"
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#include "et131x_defs.h"
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/ctype.h>
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#include <linux/string.h>
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#include <linux/timer.h>
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#include <linux/interrupt.h>
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#include <linux/in.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/bitops.h>
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#include <asm/system.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/if_arp.h>
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#include <linux/ioport.h>
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#include "et1310_phy.h"
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#include "et1310_pm.h"
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#include "et1310_jagcore.h"
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#include "et1310_mac.h"
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#include "et131x_adapter.h"
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/* Data for debugging facilities */
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#ifdef CONFIG_ET131X_DEBUG
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extern dbg_info_t *et131x_dbginfo;
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#endif /* CONFIG_ET131X_DEBUG */
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/**
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* et131x_isr - The Interrupt Service Routine for the driver.
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* @irq: the IRQ on which the interrupt was received.
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* @dev_id: device-specific info (here a pointer to a net_device struct)
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*
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* Returns a value indicating if the interrupt was handled.
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*/
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irqreturn_t et131x_isr(int irq, void *dev_id)
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{
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bool handled = true;
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struct net_device *netdev = (struct net_device *)dev_id;
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struct et131x_adapter *adapter = NULL;
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INTERRUPT_t status;
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if (netdev == NULL || !netif_device_present(netdev)) {
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DBG_WARNING(et131x_dbginfo,
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"No net_device struct or device not present\n");
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handled = false;
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goto out;
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}
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adapter = netdev_priv(netdev);
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/* If the adapter is in low power state, then it should not
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* recognize any interrupt
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*/
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/* Disable Device Interrupts */
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et131x_disable_interrupts(adapter);
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/* Get a copy of the value in the interrupt status register
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* so we can process the interrupting section
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*/
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status.value = readl(&adapter->CSRAddress->global.int_status.value);
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if (adapter->FlowControl == TxOnly ||
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adapter->FlowControl == Both) {
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status.value &= ~INT_MASK_ENABLE;
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} else {
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status.value &= ~INT_MASK_ENABLE_NO_FLOW;
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}
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/* Make sure this is our interrupt */
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if (!status.value) {
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#ifdef CONFIG_ET131X_DEBUG
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adapter->Stats.UnhandledInterruptsPerSec++;
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#endif
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handled = false;
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DBG_VERBOSE(et131x_dbginfo, "NOT OUR INTERRUPT\n");
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et131x_enable_interrupts(adapter);
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goto out;
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}
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/* This is our interrupt, so process accordingly */
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#ifdef CONFIG_ET131X_DEBUG
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if (status.bits.rxdma_xfr_done)
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adapter->Stats.RxDmaInterruptsPerSec++;
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if (status.bits.txdma_isr)
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adapter->Stats.TxDmaInterruptsPerSec++;
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#endif
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if (status.bits.watchdog_interrupt) {
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PMP_TCB pMpTcb = adapter->TxRing.CurrSendHead;
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if (pMpTcb)
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if (++pMpTcb->PacketStaleCount > 1)
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status.bits.txdma_isr = 1;
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if (adapter->RxRing.UnfinishedReceives)
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status.bits.rxdma_xfr_done = 1;
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else if (pMpTcb == NULL)
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writel(0, &adapter->CSRAddress->global.watchdog_timer);
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status.bits.watchdog_interrupt = 0;
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#ifdef CONFIG_ET131X_DEBUG
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adapter->Stats.WatchDogInterruptsPerSec++;
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#endif
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}
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if (status.value == 0) {
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/* This interrupt has in some way been "handled" by
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* the ISR. Either it was a spurious Rx interrupt, or
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* it was a Tx interrupt that has been filtered by
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* the ISR.
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*/
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et131x_enable_interrupts(adapter);
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goto out;
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}
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/* We need to save the interrupt status value for use in our
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* DPC. We will clear the software copy of that in that
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* routine.
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*/
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adapter->Stats.InterruptStatus = status;
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/* Schedule the ISR handler as a bottom-half task in the
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* kernel's tq_immediate queue, and mark the queue for
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* execution
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*/
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schedule_work(&adapter->task);
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out:
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return IRQ_RETVAL(handled);
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}
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/**
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* et131x_isr_handler - The ISR handler
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* @p_adapter, a pointer to the device's private adapter structure
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*
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* scheduled to run in a deferred context by the ISR. This is where the ISR's
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* work actually gets done.
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*/
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void et131x_isr_handler(struct work_struct *work)
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{
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struct et131x_adapter *pAdapter =
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container_of(work, struct et131x_adapter, task);
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INTERRUPT_t GlobStatus = pAdapter->Stats.InterruptStatus;
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ADDRESS_MAP_t __iomem *iomem = pAdapter->CSRAddress;
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/*
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* These first two are by far the most common. Once handled, we clear
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* their two bits in the status word. If the word is now zero, we
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* exit.
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*/
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/* Handle all the completed Transmit interrupts */
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if (GlobStatus.bits.txdma_isr) {
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DBG_TX(et131x_dbginfo, "TXDMA_ISR interrupt\n");
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et131x_handle_send_interrupt(pAdapter);
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}
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/* Handle all the completed Receives interrupts */
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if (GlobStatus.bits.rxdma_xfr_done) {
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DBG_RX(et131x_dbginfo, "RXDMA_XFR_DONE interrupt\n");
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et131x_handle_recv_interrupt(pAdapter);
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}
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GlobStatus.value &= 0xffffffd7;
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if (GlobStatus.value) {
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/* Handle the TXDMA Error interrupt */
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if (GlobStatus.bits.txdma_err) {
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TXDMA_ERROR_t TxDmaErr;
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/* Following read also clears the register (COR) */
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TxDmaErr.value = readl(&iomem->txdma.TxDmaError.value);
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DBG_WARNING(et131x_dbginfo,
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"TXDMA_ERR interrupt, error = %d\n",
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TxDmaErr.value);
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}
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/* Handle Free Buffer Ring 0 and 1 Low interrupt */
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if (GlobStatus.bits.rxdma_fb_ring0_low ||
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GlobStatus.bits.rxdma_fb_ring1_low) {
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/*
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* This indicates the number of unused buffers in
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* RXDMA free buffer ring 0 is <= the limit you
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* programmed. Free buffer resources need to be
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* returned. Free buffers are consumed as packets
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* are passed from the network to the host. The host
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* becomes aware of the packets from the contents of
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* the packet status ring. This ring is queried when
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* the packet done interrupt occurs. Packets are then
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* passed to the OS. When the OS is done with the
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* packets the resources can be returned to the
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* ET1310 for re-use. This interrupt is one method of
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* returning resources.
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*/
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DBG_WARNING(et131x_dbginfo,
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"RXDMA_FB_RING0_LOW or "
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"RXDMA_FB_RING1_LOW interrupt\n");
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/* If the user has flow control on, then we will
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* send a pause packet, otherwise just exit
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*/
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if (pAdapter->FlowControl == TxOnly ||
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pAdapter->FlowControl == Both) {
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PM_CSR_t pm_csr;
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/* Tell the device to send a pause packet via
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* the back pressure register
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*/
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pm_csr.value =
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readl(&iomem->global.pm_csr.value);
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if (pm_csr.bits.pm_phy_sw_coma == 0) {
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TXMAC_BP_CTRL_t bp_ctrl = { 0 };
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bp_ctrl.bits.bp_req = 1;
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bp_ctrl.bits.bp_xonxoff = 1;
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writel(bp_ctrl.value,
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&iomem->txmac.bp_ctrl.value);
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}
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}
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}
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/* Handle Packet Status Ring Low Interrupt */
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if (GlobStatus.bits.rxdma_pkt_stat_ring_low) {
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DBG_WARNING(et131x_dbginfo,
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"RXDMA_PKT_STAT_RING_LOW interrupt\n");
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/*
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* Same idea as with the two Free Buffer Rings.
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* Packets going from the network to the host each
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* consume a free buffer resource and a packet status
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* resource. These resoures are passed to the OS.
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* When the OS is done with the resources, they need
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* to be returned to the ET1310. This is one method
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* of returning the resources.
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*/
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}
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/* Handle RXDMA Error Interrupt */
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if (GlobStatus.bits.rxdma_err) {
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/*
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* The rxdma_error interrupt is sent when a time-out
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* on a request issued by the JAGCore has occurred or
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* a completion is returned with an un-successful
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* status. In both cases the request is considered
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* complete. The JAGCore will automatically re-try the
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* request in question. Normally information on events
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* like these are sent to the host using the "Advanced
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* Error Reporting" capability. This interrupt is
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* another way of getting similar information. The
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* only thing required is to clear the interrupt by
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* reading the ISR in the global resources. The
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* JAGCore will do a re-try on the request. Normally
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* you should never see this interrupt. If you start
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* to see this interrupt occurring frequently then
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* something bad has occurred. A reset might be the
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* thing to do.
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*/
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/* TRAP();*/
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pAdapter->TxMacTest.value =
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readl(&iomem->txmac.tx_test.value);
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DBG_WARNING(et131x_dbginfo,
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"RxDMA_ERR interrupt, error %x\n",
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pAdapter->TxMacTest.value);
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}
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/* Handle the Wake on LAN Event */
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if (GlobStatus.bits.wake_on_lan) {
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/*
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* This is a secondary interrupt for wake on LAN.
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* The driver should never see this, if it does,
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* something serious is wrong. We will TRAP the
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* message when we are in DBG mode, otherwise we
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* will ignore it.
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*/
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DBG_ERROR(et131x_dbginfo, "WAKE_ON_LAN interrupt\n");
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}
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/* Handle the PHY interrupt */
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if (GlobStatus.bits.phy_interrupt) {
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PM_CSR_t pm_csr;
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MI_BMSR_t BmsrInts, BmsrData;
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MI_ISR_t myIsr;
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DBG_VERBOSE(et131x_dbginfo, "PHY interrupt\n");
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/* If we are in coma mode when we get this interrupt,
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* we need to disable it.
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*/
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pm_csr.value = readl(&iomem->global.pm_csr.value);
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if (pm_csr.bits.pm_phy_sw_coma == 1) {
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/*
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* Check to see if we are in coma mode and if
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* so, disable it because we will not be able
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* to read PHY values until we are out.
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*/
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DBG_VERBOSE(et131x_dbginfo,
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"Device is in COMA mode, "
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"need to wake up\n");
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DisablePhyComa(pAdapter);
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}
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/* Read the PHY ISR to clear the reason for the
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* interrupt.
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*/
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MiRead(pAdapter, (uint8_t) offsetof(MI_REGS_t, isr),
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&myIsr.value);
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if (!pAdapter->ReplicaPhyLoopbk) {
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MiRead(pAdapter,
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(uint8_t) offsetof(MI_REGS_t, bmsr),
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&BmsrData.value);
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BmsrInts.value =
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pAdapter->Bmsr.value ^ BmsrData.value;
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pAdapter->Bmsr.value = BmsrData.value;
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DBG_VERBOSE(et131x_dbginfo,
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"Bmsr.value = 0x%04x,"
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"Bmsr_ints.value = 0x%04x\n",
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BmsrData.value, BmsrInts.value);
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/* Do all the cable in / cable out stuff */
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et131x_Mii_check(pAdapter, BmsrData, BmsrInts);
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}
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}
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/* Let's move on to the TxMac */
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if (GlobStatus.bits.txmac_interrupt) {
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pAdapter->TxRing.TxMacErr.value =
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readl(&iomem->txmac.err.value);
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/*
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* When any of the errors occur and TXMAC generates
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* an interrupt to report these errors, it usually
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* means that TXMAC has detected an error in the data
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* stream retrieved from the on-chip Tx Q. All of
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* these errors are catastrophic and TXMAC won't be
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* able to recover data when these errors occur. In
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* a nutshell, the whole Tx path will have to be reset
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* and re-configured afterwards.
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*/
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DBG_WARNING(et131x_dbginfo,
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"TXMAC interrupt, error 0x%08x\n",
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pAdapter->TxRing.TxMacErr.value);
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/* If we are debugging, we want to see this error,
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* otherwise we just want the device to be reset and
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* continue
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*/
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/* DBG_TRAP(); */
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}
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/* Handle RXMAC Interrupt */
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if (GlobStatus.bits.rxmac_interrupt) {
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/*
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* These interrupts are catastrophic to the device,
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* what we need to do is disable the interrupts and
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* set the flag to cause us to reset so we can solve
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* this issue.
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*/
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/* MP_SET_FLAG( pAdapter,
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fMP_ADAPTER_HARDWARE_ERROR); */
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DBG_WARNING(et131x_dbginfo,
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"RXMAC interrupt, error 0x%08x. Requesting reset\n",
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readl(&iomem->rxmac.err_reg.value));
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DBG_WARNING(et131x_dbginfo,
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"Enable 0x%08x, Diag 0x%08x\n",
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readl(&iomem->rxmac.ctrl.value),
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readl(&iomem->rxmac.rxq_diag.value));
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/*
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* If we are debugging, we want to see this error,
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* otherwise we just want the device to be reset and
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* continue
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*/
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/* TRAP(); */
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}
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/* Handle MAC_STAT Interrupt */
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if (GlobStatus.bits.mac_stat_interrupt) {
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/*
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* This means at least one of the un-masked counters
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* in the MAC_STAT block has rolled over. Use this
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* to maintain the top, software managed bits of the
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* counter(s).
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*/
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DBG_VERBOSE(et131x_dbginfo, "MAC_STAT interrupt\n");
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HandleMacStatInterrupt(pAdapter);
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}
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/* Handle SLV Timeout Interrupt */
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if (GlobStatus.bits.slv_timeout) {
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/*
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* This means a timeout has occured on a read or
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* write request to one of the JAGCore registers. The
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* Global Resources block has terminated the request
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* and on a read request, returned a "fake" value.
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* The most likely reasons are: Bad Address or the
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* addressed module is in a power-down state and
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* can't respond.
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*/
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DBG_VERBOSE(et131x_dbginfo, "SLV_TIMEOUT interrupt\n");
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}
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}
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if (pAdapter->PoMgmt.PowerState == NdisDeviceStateD0)
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et131x_enable_interrupts(pAdapter);
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}
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