fe950df700
The base address of the PCI memory is 0x10000000 and the base address of the PCI configuration space is 0x17000000 on the AR71xx SoCs. The AR71XX_PCI_MEM_SIZE is defined as 0x08000000 which is wrong because that overlaps with the configuration space. This patch fixes the value of the AR71XX_PCI_MEM_SIZE constant, in order to avoid this resource conflicts. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4873/ Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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.. | ||
fixup-bcm63xx.c | ||
fixup-capcella.c | ||
fixup-cobalt.c | ||
fixup-emma2rh.c | ||
fixup-fuloong2e.c | ||
fixup-ip32.c | ||
fixup-jmr3927.c | ||
fixup-lantiq.c | ||
fixup-lemote2f.c | ||
fixup-malta.c | ||
fixup-mpc30x.c | ||
fixup-pmcmsp.c | ||
fixup-pnx8550.c | ||
fixup-rbtx4927.c | ||
fixup-rbtx4938.c | ||
fixup-rc32434.c | ||
fixup-sb1250.c | ||
fixup-sni.c | ||
fixup-tb0219.c | ||
fixup-tb0226.c | ||
fixup-tb0287.c | ||
fixup-wrppmc.c | ||
Makefile | ||
msi-octeon.c | ||
ops-bcm63xx.c | ||
ops-bonito64.c | ||
ops-bridge.c | ||
ops-emma2rh.c | ||
ops-gt64xxx_pci0.c | ||
ops-lantiq.c | ||
ops-loongson2.c | ||
ops-mace.c | ||
ops-msc.c | ||
ops-nile4.c | ||
ops-pmcmsp.c | ||
ops-pnx8550.c | ||
ops-rc32434.c | ||
ops-sni.c | ||
ops-tx3927.c | ||
ops-tx4927.c | ||
ops-vr41xx.c | ||
pci-alchemy.c | ||
pci-ar71xx.c | ||
pci-ar724x.c | ||
pci-bcm47xx.c | ||
pci-bcm63xx.c | ||
pci-bcm63xx.h | ||
pci-bcm1480.c | ||
pci-bcm1480ht.c | ||
pci-emma2rh.c | ||
pci-ip27.c | ||
pci-ip32.c | ||
pci-lantiq.c | ||
pci-lantiq.h | ||
pci-lasat.c | ||
pci-octeon.c | ||
pci-rc32434.c | ||
pci-sb1250.c | ||
pci-tx4927.c | ||
pci-tx4938.c | ||
pci-tx4939.c | ||
pci-vr41xx.c | ||
pci-vr41xx.h | ||
pci-xlp.c | ||
pci-xlr.c | ||
pci.c | ||
pcie-octeon.c |