29cb3cd208
There are SoCs where attempting to enter a low power state is ignored, and the CPU continues executing instructions with all state preserved. It is over-complex at that point to disable the MMU just to call the resume path. Instead, allow the suspend finisher to return error codes to abort suspend in this circumstance, where the cpu_suspend internals will then unwind the saved state on the stack. Also omit the tlb flush as no changes to the page tables will have happened. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
198 lines
5.0 KiB
C
198 lines
5.0 KiB
C
/* linux/arch/arm/plat-s3c64xx/pm.c
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C64XX CPU PM support.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/suspend.h>
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#include <linux/serial_core.h>
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#include <linux/io.h>
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#include <mach/map.h>
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#include <mach/irqs.h>
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#include <plat/pm.h>
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#include <plat/wakeup-mask.h>
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#include <mach/regs-sys.h>
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#include <mach/regs-gpio.h>
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#include <mach/regs-clock.h>
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#include <mach/regs-syscon-power.h>
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#include <mach/regs-gpio-memport.h>
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#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
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void s3c_pm_debug_smdkled(u32 set, u32 clear)
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{
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unsigned long flags;
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int i;
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local_irq_save(flags);
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for (i = 0; i < 4; i++) {
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if (clear & (1 << i))
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gpio_set_value(S3C64XX_GPN(12 + i), 0);
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if (set & (1 << i))
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gpio_set_value(S3C64XX_GPN(12 + i), 1);
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}
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local_irq_restore(flags);
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}
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#endif
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static struct sleep_save core_save[] = {
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SAVE_ITEM(S3C_APLL_LOCK),
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SAVE_ITEM(S3C_MPLL_LOCK),
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SAVE_ITEM(S3C_EPLL_LOCK),
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SAVE_ITEM(S3C_CLK_SRC),
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SAVE_ITEM(S3C_CLK_DIV0),
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SAVE_ITEM(S3C_CLK_DIV1),
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SAVE_ITEM(S3C_CLK_DIV2),
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SAVE_ITEM(S3C_CLK_OUT),
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SAVE_ITEM(S3C_HCLK_GATE),
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SAVE_ITEM(S3C_PCLK_GATE),
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SAVE_ITEM(S3C_SCLK_GATE),
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SAVE_ITEM(S3C_MEM0_GATE),
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SAVE_ITEM(S3C_EPLL_CON1),
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SAVE_ITEM(S3C_EPLL_CON0),
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SAVE_ITEM(S3C64XX_MEM0DRVCON),
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SAVE_ITEM(S3C64XX_MEM1DRVCON),
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#ifndef CONFIG_CPU_FREQ
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SAVE_ITEM(S3C_APLL_CON),
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SAVE_ITEM(S3C_MPLL_CON),
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#endif
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};
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static struct sleep_save misc_save[] = {
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SAVE_ITEM(S3C64XX_AHB_CON0),
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SAVE_ITEM(S3C64XX_AHB_CON1),
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SAVE_ITEM(S3C64XX_AHB_CON2),
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SAVE_ITEM(S3C64XX_SPCON),
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SAVE_ITEM(S3C64XX_MEM0CONSTOP),
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SAVE_ITEM(S3C64XX_MEM1CONSTOP),
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SAVE_ITEM(S3C64XX_MEM0CONSLP0),
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SAVE_ITEM(S3C64XX_MEM0CONSLP1),
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SAVE_ITEM(S3C64XX_MEM1CONSLP),
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};
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void s3c_pm_configure_extint(void)
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{
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__raw_writel(s3c_irqwake_eintmask, S3C64XX_EINT_MASK);
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}
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void s3c_pm_restore_core(void)
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{
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__raw_writel(0, S3C64XX_EINT_MASK);
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s3c_pm_debug_smdkled(1 << 2, 0);
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s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
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s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save));
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}
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void s3c_pm_save_core(void)
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{
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s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save));
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s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));
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}
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/* since both s3c6400 and s3c6410 share the same sleep pm calls, we
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* put the per-cpu code in here until any new cpu comes along and changes
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* this.
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*/
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static int s3c64xx_cpu_suspend(unsigned long arg)
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{
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unsigned long tmp;
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/* set our standby method to sleep */
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tmp = __raw_readl(S3C64XX_PWR_CFG);
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tmp &= ~S3C64XX_PWRCFG_CFG_WFI_MASK;
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tmp |= S3C64XX_PWRCFG_CFG_WFI_SLEEP;
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__raw_writel(tmp, S3C64XX_PWR_CFG);
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/* clear any old wakeup */
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__raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT),
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S3C64XX_WAKEUP_STAT);
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/* set the LED state to 0110 over sleep */
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s3c_pm_debug_smdkled(3 << 1, 0xf);
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/* issue the standby signal into the pm unit. Note, we
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* issue a write-buffer drain just in case */
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tmp = 0;
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asm("b 1f\n\t"
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".align 5\n\t"
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"1:\n\t"
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"mcr p15, 0, %0, c7, c10, 5\n\t"
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"mcr p15, 0, %0, c7, c10, 4\n\t"
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"mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp));
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/* we should never get past here */
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panic("sleep resumed to originator?");
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}
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/* mapping of interrupts to parts of the wakeup mask */
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static struct samsung_wakeup_mask wake_irqs[] = {
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{ .irq = IRQ_RTC_ALARM, .bit = S3C64XX_PWRCFG_RTC_ALARM_DISABLE, },
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{ .irq = IRQ_RTC_TIC, .bit = S3C64XX_PWRCFG_RTC_TICK_DISABLE, },
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{ .irq = IRQ_PENDN, .bit = S3C64XX_PWRCFG_TS_DISABLE, },
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{ .irq = IRQ_HSMMC0, .bit = S3C64XX_PWRCFG_MMC0_DISABLE, },
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{ .irq = IRQ_HSMMC1, .bit = S3C64XX_PWRCFG_MMC1_DISABLE, },
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{ .irq = IRQ_HSMMC2, .bit = S3C64XX_PWRCFG_MMC2_DISABLE, },
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{ .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_BATF_DISABLE},
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{ .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE },
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{ .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_HSI_DISABLE },
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{ .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE },
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};
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static void s3c64xx_pm_prepare(void)
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{
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samsung_sync_wakemask(S3C64XX_PWR_CFG,
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wake_irqs, ARRAY_SIZE(wake_irqs));
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/* store address of resume. */
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__raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0);
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/* ensure previous wakeup state is cleared before sleeping */
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__raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT);
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}
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static int s3c64xx_pm_init(void)
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{
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pm_cpu_prep = s3c64xx_pm_prepare;
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pm_cpu_sleep = s3c64xx_cpu_suspend;
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pm_uart_udivslot = 1;
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#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
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gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
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gpio_request(S3C64XX_GPN(13), "DEBUG_LED1");
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gpio_request(S3C64XX_GPN(14), "DEBUG_LED2");
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gpio_request(S3C64XX_GPN(15), "DEBUG_LED3");
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gpio_direction_output(S3C64XX_GPN(12), 0);
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gpio_direction_output(S3C64XX_GPN(13), 0);
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gpio_direction_output(S3C64XX_GPN(14), 0);
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gpio_direction_output(S3C64XX_GPN(15), 0);
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#endif
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return 0;
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}
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arch_initcall(s3c64xx_pm_init);
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