42ddcf4f9e
H3 PWM controller has same register layout as sun4i driver, so it works by adding H3 specific data. Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: linux-pwm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Milo Kim <woogyom.kim@gmail.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
24 lines
671 B
Plaintext
24 lines
671 B
Plaintext
Allwinner sun4i and sun7i SoC PWM controller
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Required properties:
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- compatible: should be one of:
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- "allwinner,sun4i-a10-pwm"
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- "allwinner,sun5i-a10s-pwm"
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- "allwinner,sun5i-a13-pwm"
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- "allwinner,sun7i-a20-pwm"
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- "allwinner,sun8i-h3-pwm"
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- reg: physical base address and length of the controller's registers
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- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
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the cells format.
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- clocks: From common clock binding, handle to the parent clock.
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Example:
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pwm: pwm@01c20e00 {
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compatible = "allwinner,sun7i-a20-pwm";
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reg = <0x01c20e00 0xc>;
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clocks = <&osc24M>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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