David Daney 0c3263870f MIPS: Octeon: Rewrite interrupt handling code. ... This includes conversion to new style irq_chip functions, and correctly enabling/disabling per-CPU interrupts. The hardware interrupt bit to irq number mapping is now done with a flexible map, instead of by bit twiddling the irq number. [ tglx: Adjusted to new irq_cpu_on/offline callbacks and __irq_set_affinity_lock ] Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: ralf@linux-mips.org LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>		2011-03-29 14:48:06 +02:00
..
cpu-feature-overrides.h	MIPS: Octeon: Enable Read Inhibit / eXecute Inhibit on Octeon II.	2010-10-29 19:08:38 +01:00
dma-coherence.h	MIPS: Octeon: Rewrite DMA mapping functions.	2010-10-29 19:08:32 +01:00
irq.h	MIPS: Octeon: Rewrite interrupt handling code.	2011-03-29 14:48:06 +02:00
kernel-entry-init.h
war.h