694caf0255
Remove CONFIG_POWER4_ONLY, the option is badly named and only does two things: - It wraps the MMU segment table code. With feature fixups there is little downside to compiling this in. - It uses the newer mtocrf instruction in various assembly functions. Instead of making this a compile option just do it at runtime via a feature fixup. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
120 lines
1.9 KiB
ArmAsm
120 lines
1.9 KiB
ArmAsm
/*
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* String handling functions for PowerPC.
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*
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* Copyright (C) 1996 Paul Mackerras.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/processor.h>
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#include <asm/errno.h>
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#include <asm/ppc_asm.h>
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_GLOBAL(memset)
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neg r0,r3
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rlwimi r4,r4,8,16,23
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andi. r0,r0,7 /* # bytes to be 8-byte aligned */
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rlwimi r4,r4,16,0,15
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cmplw cr1,r5,r0 /* do we get that far? */
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rldimi r4,r4,32,0
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PPC_MTOCRF(1,r0)
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mr r6,r3
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blt cr1,8f
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beq+ 3f /* if already 8-byte aligned */
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subf r5,r0,r5
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bf 31,1f
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stb r4,0(r6)
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addi r6,r6,1
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1: bf 30,2f
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sth r4,0(r6)
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addi r6,r6,2
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2: bf 29,3f
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stw r4,0(r6)
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addi r6,r6,4
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3: srdi. r0,r5,6
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clrldi r5,r5,58
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mtctr r0
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beq 5f
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4: std r4,0(r6)
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std r4,8(r6)
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std r4,16(r6)
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std r4,24(r6)
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std r4,32(r6)
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std r4,40(r6)
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std r4,48(r6)
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std r4,56(r6)
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addi r6,r6,64
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bdnz 4b
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5: srwi. r0,r5,3
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clrlwi r5,r5,29
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PPC_MTOCRF(1,r0)
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beq 8f
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bf 29,6f
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std r4,0(r6)
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std r4,8(r6)
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std r4,16(r6)
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std r4,24(r6)
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addi r6,r6,32
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6: bf 30,7f
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std r4,0(r6)
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std r4,8(r6)
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addi r6,r6,16
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7: bf 31,8f
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std r4,0(r6)
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addi r6,r6,8
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8: cmpwi r5,0
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PPC_MTOCRF(1,r5)
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beqlr+
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bf 29,9f
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stw r4,0(r6)
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addi r6,r6,4
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9: bf 30,10f
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sth r4,0(r6)
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addi r6,r6,2
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10: bflr 31
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stb r4,0(r6)
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blr
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_GLOBAL(memmove)
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cmplw 0,r3,r4
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bgt .backwards_memcpy
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b .memcpy
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_GLOBAL(backwards_memcpy)
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rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
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add r6,r3,r5
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add r4,r4,r5
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beq 2f
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andi. r0,r6,3
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mtctr r7
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bne 5f
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1: lwz r7,-4(r4)
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lwzu r8,-8(r4)
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stw r7,-4(r6)
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stwu r8,-8(r6)
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bdnz 1b
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andi. r5,r5,7
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2: cmplwi 0,r5,4
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blt 3f
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lwzu r0,-4(r4)
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subi r5,r5,4
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stwu r0,-4(r6)
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3: cmpwi 0,r5,0
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beqlr
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mtctr r5
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4: lbzu r0,-1(r4)
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stbu r0,-1(r6)
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bdnz 4b
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blr
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5: mtctr r0
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6: lbzu r7,-1(r4)
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stbu r7,-1(r6)
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bdnz 6b
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subf r5,r0,r5
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rlwinm. r7,r5,32-3,3,31
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beq 2b
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mtctr r7
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b 1b
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