c80e1b62ff
As part of handling a crash on an SMP system, an IPI is send to all other CPUs to save their current registers and stop. It was using task_pt_regs(current) to get the registers, but that will only be accurate if the CPU was interrupted running in userland. Instead allow the architecture to pass in the registers (all pass NULL now, but allow for the future) and then use get_irq_regs() which should be accurate as we are in an interrupt. Fall back to task_pt_regs(current) if nothing else is available. Signed-off-by: Corey Minyard <cminyard@mvista.com> Cc: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13050/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
81 lines
2.0 KiB
C
81 lines
2.0 KiB
C
#include <linux/kernel.h>
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#include <linux/smp.h>
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#include <linux/reboot.h>
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#include <linux/kexec.h>
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#include <linux/bootmem.h>
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#include <linux/crash_dump.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/types.h>
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#include <linux/sched.h>
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/* This keeps a track of which one is crashing cpu. */
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static int crashing_cpu = -1;
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static cpumask_t cpus_in_crash = CPU_MASK_NONE;
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#ifdef CONFIG_SMP
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static void crash_shutdown_secondary(void *passed_regs)
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{
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struct pt_regs *regs = passed_regs;
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int cpu = smp_processor_id();
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/*
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* If we are passed registers, use those. Otherwise get the
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* regs from the last interrupt, which should be correct, as
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* we are in an interrupt. But if the regs are not there,
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* pull them from the top of the stack. They are probably
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* wrong, but we need something to keep from crashing again.
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*/
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if (!regs)
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regs = get_irq_regs();
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if (!regs)
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regs = task_pt_regs(current);
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if (!cpu_online(cpu))
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return;
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local_irq_disable();
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if (!cpumask_test_cpu(cpu, &cpus_in_crash))
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crash_save_cpu(regs, cpu);
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cpumask_set_cpu(cpu, &cpus_in_crash);
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while (!atomic_read(&kexec_ready_to_reboot))
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cpu_relax();
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relocated_kexec_smp_wait(NULL);
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/* NOTREACHED */
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}
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static void crash_kexec_prepare_cpus(void)
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{
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unsigned int msecs;
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unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */
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dump_send_ipi(crash_shutdown_secondary);
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smp_wmb();
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/*
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* The crash CPU sends an IPI and wait for other CPUs to
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* respond. Delay of at least 10 seconds.
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*/
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pr_emerg("Sending IPI to other cpus...\n");
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msecs = 10000;
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while ((cpumask_weight(&cpus_in_crash) < ncpus) && (--msecs > 0)) {
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cpu_relax();
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mdelay(1);
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}
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}
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#else /* !defined(CONFIG_SMP) */
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static void crash_kexec_prepare_cpus(void) {}
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#endif /* !defined(CONFIG_SMP) */
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void default_machine_crash_shutdown(struct pt_regs *regs)
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{
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local_irq_disable();
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crashing_cpu = smp_processor_id();
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crash_save_cpu(regs, crashing_cpu);
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crash_kexec_prepare_cpus();
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cpumask_set_cpu(crashing_cpu, &cpus_in_crash);
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}
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