61b1a94254
This patch slightly change the TLB flush batch mecanism so that we store the full vaddr (including vsid) when adding an entry to the batch so that the flush part doesn't have to get to the context. This cleans it a bit, and paves the way to future updates like dynamic vsids. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
52 lines
1.5 KiB
C
52 lines
1.5 KiB
C
#ifndef _PPC64_TLBFLUSH_H
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#define _PPC64_TLBFLUSH_H
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/*
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* TLB flushing:
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*
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* - flush_tlb_mm(mm) flushes the specified mm context TLB's
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* - flush_tlb_page(vma, vmaddr) flushes one page
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* - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
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* - flush_tlb_range(vma, start, end) flushes a range of pages
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* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
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* - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
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*/
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#include <linux/percpu.h>
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#include <asm/page.h>
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#define PPC64_TLB_BATCH_NR 192
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struct mm_struct;
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struct ppc64_tlb_batch {
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unsigned long index;
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struct mm_struct *mm;
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pte_t pte[PPC64_TLB_BATCH_NR];
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unsigned long vaddr[PPC64_TLB_BATCH_NR];
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};
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DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
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extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
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static inline void flush_tlb_pending(void)
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{
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struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
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if (batch->index)
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__flush_tlb_pending(batch);
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put_cpu_var(ppc64_tlb_batch);
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}
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#define flush_tlb_mm(mm) flush_tlb_pending()
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#define flush_tlb_page(vma, addr) flush_tlb_pending()
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#define flush_tlb_page_nohash(vma, addr) do { } while (0)
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#define flush_tlb_range(vma, start, end) \
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do { (void)(start); flush_tlb_pending(); } while (0)
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#define flush_tlb_kernel_range(start, end) flush_tlb_pending()
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#define flush_tlb_pgtables(mm, start, end) do { } while (0)
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extern void flush_hash_page(unsigned long va, pte_t pte, int local);
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void flush_hash_range(unsigned long number, int local);
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#endif /* _PPC64_TLBFLUSH_H */
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