262cd81602
Signed-off-by: Mike McCormack <mikem@ring3k.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
678 lines
18 KiB
C
678 lines
18 KiB
C
/*
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This is part of the rtl8192 driver
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released under the GPL (See file COPYING for details).
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This files contains programming code for the rtl8256
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radio frontend.
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*Many* thanks to Realtek Corp. for their great support!
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*/
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#include "r8192E.h"
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#include "r8192E_hw.h"
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#include "r819xE_phyreg.h"
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#include "r819xE_phy.h"
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#include "r8190_rtl8256.h"
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/*--------------------------------------------------------------------------
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* Overview: set RF band width (20M or 40M)
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* Input: struct net_device* dev
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* WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M
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* Output: NONE
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* Return: NONE
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* Note: 8226 support both 20M and 40 MHz
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*---------------------------------------------------------------------------*/
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void PHY_SetRF8256Bandwidth(struct r8192_priv *priv, HT_CHANNEL_WIDTH Bandwidth) //20M or 40M
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{
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u8 eRFPath;
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//for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
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for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++)
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{
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if (!rtl8192_phy_CheckIsLegalRFPath(priv, eRFPath))
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continue;
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switch(Bandwidth)
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{
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case HT_CHANNEL_WIDTH_20:
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if(priv->card_8192_version == VERSION_8190_BD || priv->card_8192_version == VERSION_8190_BE)// 8256 D-cut, E-cut, xiong: consider it later!
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{
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rtl8192_phy_SetRFReg(priv, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x100); //phy para:1ba
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rtl8192_phy_SetRFReg(priv, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3d7);
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rtl8192_phy_SetRFReg(priv, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x021);
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//cosa add for sd3's request 01/23/2008
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//rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab);
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}
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else
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{
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RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
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}
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break;
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case HT_CHANNEL_WIDTH_20_40:
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if(priv->card_8192_version == VERSION_8190_BD ||priv->card_8192_version == VERSION_8190_BE)// 8256 D-cut, E-cut, xiong: consider it later!
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{
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rtl8192_phy_SetRFReg(priv, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x300); //phy para:3ba
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rtl8192_phy_SetRFReg(priv, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3ff);
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rtl8192_phy_SetRFReg(priv, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x0e1);
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}
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else
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{
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RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
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}
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break;
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default:
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RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth );
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break;
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}
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}
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}
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/*--------------------------------------------------------------------------
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* Overview: Interface to config 8256
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* Input: struct net_device* dev
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* Output: NONE
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* Return: NONE
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*---------------------------------------------------------------------------*/
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RT_STATUS PHY_RF8256_Config(struct r8192_priv *priv)
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{
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// Initialize general global value
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//
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RT_STATUS rtStatus = RT_STATUS_SUCCESS;
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// TODO: Extend RF_PATH_C and RF_PATH_D in the future
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priv->NumTotalRFPath = RTL819X_TOTAL_RF_PATH;
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// Config BB and RF
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rtStatus = phy_RF8256_Config_ParaFile(priv);
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return rtStatus;
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}
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/*--------------------------------------------------------------------------
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* Overview: Interface to config 8256
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* Input: struct net_device* dev
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* Output: NONE
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* Return: NONE
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*---------------------------------------------------------------------------*/
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RT_STATUS phy_RF8256_Config_ParaFile(struct r8192_priv *priv)
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{
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u32 u4RegValue = 0;
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u8 eRFPath;
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RT_STATUS rtStatus = RT_STATUS_SUCCESS;
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BB_REGISTER_DEFINITION_T *pPhyReg;
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u32 RegOffSetToBeCheck = 0x3;
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u32 RegValueToBeCheck = 0x7f1;
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u32 RF3_Final_Value = 0;
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u8 ConstRetryTimes = 5, RetryTimes = 5;
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u8 ret = 0;
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//3//-----------------------------------------------------------------
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//3// <2> Initialize RF
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//3//-----------------------------------------------------------------
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for(eRFPath = (RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++)
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{
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if (!rtl8192_phy_CheckIsLegalRFPath(priv, eRFPath))
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continue;
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pPhyReg = &priv->PHYRegDef[eRFPath];
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/*----Store original RFENV control type----*/
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switch(eRFPath)
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{
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case RF90_PATH_A:
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case RF90_PATH_C:
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u4RegValue = rtl8192_QueryBBReg(priv, pPhyReg->rfintfs, bRFSI_RFENV);
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break;
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case RF90_PATH_B :
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case RF90_PATH_D:
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u4RegValue = rtl8192_QueryBBReg(priv, pPhyReg->rfintfs, bRFSI_RFENV<<16);
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break;
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}
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/*----Set RF_ENV enable----*/
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rtl8192_setBBreg(priv, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
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/*----Set RF_ENV output high----*/
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rtl8192_setBBreg(priv, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
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/* Set bit number of Address and Data for RF register */
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rtl8192_setBBreg(priv, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 0 to 4 bits for Z-serial and set 1 to 6 bits for 8258
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rtl8192_setBBreg(priv, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for Z-serial and 8258, and set 1 to 14 bits for ???
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rtl8192_phy_SetRFReg(priv, (RF90_RADIO_PATH_E) eRFPath, 0x0, bMask12Bits, 0xbf);
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/*----Check RF block (for FPGA platform only)----*/
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// TODO: this function should be removed on ASIC , Emily 2007.2.2
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rtStatus = rtl8192_phy_checkBBAndRF(priv, HW90_BLOCK_RF, (RF90_RADIO_PATH_E)eRFPath);
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if(rtStatus!= RT_STATUS_SUCCESS)
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{
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RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath);
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goto phy_RF8256_Config_ParaFile_Fail;
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}
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RetryTimes = ConstRetryTimes;
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RF3_Final_Value = 0;
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/*----Initialize RF fom connfiguration file----*/
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switch(eRFPath)
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{
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case RF90_PATH_A:
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while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0)
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{
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ret = rtl8192_phy_ConfigRFWithHeaderFile(priv,(RF90_RADIO_PATH_E)eRFPath);
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RF3_Final_Value = rtl8192_phy_QueryRFReg(priv, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
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RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
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RetryTimes--;
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}
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break;
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case RF90_PATH_B:
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while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0)
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{
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ret = rtl8192_phy_ConfigRFWithHeaderFile(priv,(RF90_RADIO_PATH_E)eRFPath);
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RF3_Final_Value = rtl8192_phy_QueryRFReg(priv, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
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RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
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RetryTimes--;
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}
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break;
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case RF90_PATH_C:
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while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0)
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{
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ret = rtl8192_phy_ConfigRFWithHeaderFile(priv,(RF90_RADIO_PATH_E)eRFPath);
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RF3_Final_Value = rtl8192_phy_QueryRFReg(priv, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
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RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
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RetryTimes--;
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}
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break;
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case RF90_PATH_D:
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while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0)
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{
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ret = rtl8192_phy_ConfigRFWithHeaderFile(priv,(RF90_RADIO_PATH_E)eRFPath);
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RF3_Final_Value = rtl8192_phy_QueryRFReg(priv, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
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RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
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RetryTimes--;
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}
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break;
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}
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/*----Restore RFENV control type----*/;
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switch(eRFPath)
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{
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case RF90_PATH_A:
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case RF90_PATH_C:
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rtl8192_setBBreg(priv, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
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break;
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case RF90_PATH_B :
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case RF90_PATH_D:
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rtl8192_setBBreg(priv, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
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break;
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}
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if(ret){
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RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath);
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goto phy_RF8256_Config_ParaFile_Fail;
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}
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}
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RT_TRACE(COMP_PHY, "PHY Initialization Success\n") ;
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return RT_STATUS_SUCCESS;
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phy_RF8256_Config_ParaFile_Fail:
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RT_TRACE(COMP_ERR, "PHY Initialization failed\n") ;
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return RT_STATUS_FAILURE;
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}
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void PHY_SetRF8256CCKTxPower(struct r8192_priv *priv, u8 powerlevel)
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{
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u32 TxAGC=0;
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TxAGC = powerlevel;
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if(priv->bDynamicTxLowPower == true)//cosa 04282008 for cck long range
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{
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if(priv->CustomerID == RT_CID_819x_Netcore)
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TxAGC = 0x22;
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else
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TxAGC += priv->CckPwEnl;
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}
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if(TxAGC > 0x24)
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TxAGC = 0x24;
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rtl8192_setBBreg(priv, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC);
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}
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void PHY_SetRF8256OFDMTxPower(struct r8192_priv *priv, u8 powerlevel)
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{
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u32 writeVal, powerBase0, powerBase1, writeVal_tmp;
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u8 index = 0;
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u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
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u8 byte0, byte1, byte2, byte3;
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powerBase0 = powerlevel + priv->LegacyHTTxPowerDiff; //OFDM rates
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powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0;
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powerBase1 = powerlevel; //MCS rates
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powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1;
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for(index=0; index<6; index++)
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{
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writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index<2)?powerBase0:powerBase1);
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byte0 = (u8)(writeVal & 0x7f);
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byte1 = (u8)((writeVal & 0x7f00)>>8);
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byte2 = (u8)((writeVal & 0x7f0000)>>16);
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byte3 = (u8)((writeVal & 0x7f000000)>>24);
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if(byte0 > 0x24) // Max power index = 0x24
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byte0 = 0x24;
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if(byte1 > 0x24)
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byte1 = 0x24;
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if(byte2 > 0x24)
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byte2 = 0x24;
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if(byte3 > 0x24)
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byte3 = 0x24;
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if(index == 3)
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{
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writeVal_tmp = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
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priv->Pwr_Track = writeVal_tmp;
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}
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if(priv->bDynamicTxHighPower == true) //Add by Jacken 2008/03/06 //when DM implement, add this
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{
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writeVal = 0x03030303;
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}
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else
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{
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writeVal = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
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}
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rtl8192_setBBreg(priv, RegOffset[index], 0x7f7f7f7f, writeVal);
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}
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}
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#define MAX_DOZE_WAITING_TIMES_9x 64
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static void r8192e_drain_tx_queues(struct r8192_priv *priv)
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{
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u8 i, QueueID;
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for (QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; )
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{
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struct rtl8192_tx_ring *ring = &priv->tx_ring[QueueID];
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if(skb_queue_len(&ring->queue) == 0)
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{
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QueueID++;
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continue;
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}
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udelay(10);
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i++;
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if (i >= MAX_DOZE_WAITING_TIMES_9x)
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{
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RT_TRACE(COMP_POWER, "r8192e_drain_tx_queues() timeout queue %d\n", QueueID);
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break;
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}
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}
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}
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static bool SetRFPowerState8190(struct r8192_priv *priv,
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RT_RF_POWER_STATE eRFPowerState)
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{
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PRT_POWER_SAVE_CONTROL pPSC = &priv->PowerSaveControl;
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bool bResult = true;
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if (eRFPowerState == priv->eRFPowerState &&
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priv->bHwRfOffAction == 0) {
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bResult = false;
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goto out;
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}
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switch( eRFPowerState )
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{
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case eRfOn:
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// turn on RF
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if ((priv->eRFPowerState == eRfOff) &&
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RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))
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{
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/*
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* The current RF state is OFF and the RF OFF level
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* is halting the NIC, re-initialize the NIC.
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*/
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if (!NicIFEnableNIC(priv)) {
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RT_TRACE(COMP_ERR, "%s(): NicIFEnableNIC failed\n",__FUNCTION__);
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bResult = false;
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goto out;
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}
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RT_CLEAR_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
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} else {
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write_nic_byte(priv, ANAPAR, 0x37);//160MHz
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mdelay(1);
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//enable clock 80/88 MHz
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rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x4, 0x1); // 0x880[2]
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priv->bHwRfOffAction = 0;
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//RF-A, RF-B
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//enable RF-Chip A/B
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rtl8192_setBBreg(priv, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4]
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//analog to digital on
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rtl8192_setBBreg(priv, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8]
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//digital to analog on
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rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x18, 0x3); // 0x880[4:3]
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//rx antenna on
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rtl8192_setBBreg(priv, rOFDM0_TRxPathEnable, 0x3, 0x3);// 0xc04[1:0]
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//rx antenna on
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rtl8192_setBBreg(priv, rOFDM1_TRxPathEnable, 0x3, 0x3);// 0xd04[1:0]
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//analog to digital part2 on
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rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5]
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}
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break;
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//
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// In current solution, RFSleep=RFOff in order to save power under 802.11 power save.
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// By Bruce, 2008-01-16.
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//
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case eRfSleep:
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// HW setting had been configured with deeper mode.
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if(priv->eRFPowerState == eRfOff)
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break;
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r8192e_drain_tx_queues(priv);
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PHY_SetRtl8192eRfOff(priv);
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break;
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case eRfOff:
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//
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// Disconnect with Any AP or STA.
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//
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r8192e_drain_tx_queues(priv);
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if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))
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{
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/* Disable all components. */
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NicIFDisableNIC(priv);
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RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);
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}
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else if (!(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC))
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{
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/* Normal case - IPS should go to this. */
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PHY_SetRtl8192eRfOff(priv);
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}
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break;
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default:
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bResult = false;
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RT_TRACE(COMP_ERR, "SetRFPowerState8190(): unknow state to set: 0x%X!!!\n", eRFPowerState);
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break;
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}
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if(bResult)
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{
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// Update current RF state variable.
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priv->eRFPowerState = eRFPowerState;
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}
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out:
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return bResult;
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}
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static void MgntDisconnectIBSS(struct r8192_priv *priv)
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{
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u8 i;
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bool bFilterOutNonAssociatedBSSID = false;
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priv->ieee80211->state = IEEE80211_NOLINK;
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for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i]= 0x55;
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priv->OpMode = RT_OP_MODE_NO_LINK;
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write_nic_word(priv, BSSIDR, ((u16*)priv->ieee80211->current_network.bssid)[0]);
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write_nic_dword(priv, BSSIDR+2, ((u32*)(priv->ieee80211->current_network.bssid+2))[0]);
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{
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RT_OP_MODE OpMode = priv->OpMode;
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u8 btMsr = read_nic_byte(priv, MSR);
|
|
|
|
btMsr &= 0xfc;
|
|
|
|
switch(OpMode)
|
|
{
|
|
case RT_OP_MODE_INFRASTRUCTURE:
|
|
btMsr |= MSR_LINK_MANAGED;
|
|
break;
|
|
|
|
case RT_OP_MODE_IBSS:
|
|
btMsr |= MSR_LINK_ADHOC;
|
|
// led link set separate
|
|
break;
|
|
|
|
case RT_OP_MODE_AP:
|
|
btMsr |= MSR_LINK_MASTER;
|
|
break;
|
|
|
|
default:
|
|
btMsr |= MSR_LINK_NONE;
|
|
break;
|
|
}
|
|
|
|
write_nic_byte(priv, MSR, btMsr);
|
|
}
|
|
ieee80211_stop_send_beacons(priv->ieee80211);
|
|
|
|
// If disconnect, clear RCR CBSSID bit
|
|
bFilterOutNonAssociatedBSSID = false;
|
|
{
|
|
u32 RegRCR, Type;
|
|
Type = bFilterOutNonAssociatedBSSID;
|
|
RegRCR = read_nic_dword(priv, RCR);
|
|
priv->ReceiveConfig = RegRCR;
|
|
if (Type == true)
|
|
RegRCR |= (RCR_CBSSID);
|
|
else if (Type == false)
|
|
RegRCR &= (~RCR_CBSSID);
|
|
|
|
{
|
|
write_nic_dword(priv, RCR, RegRCR);
|
|
priv->ReceiveConfig = RegRCR;
|
|
}
|
|
|
|
}
|
|
notify_wx_assoc_event(priv->ieee80211);
|
|
|
|
}
|
|
|
|
static void MlmeDisassociateRequest(struct r8192_priv *priv, u8 *asSta,
|
|
u8 asRsn)
|
|
{
|
|
u8 i;
|
|
|
|
RemovePeerTS(priv->ieee80211, asSta);
|
|
|
|
SendDisassociation( priv->ieee80211, asSta, asRsn );
|
|
|
|
if(memcpy(priv->ieee80211->current_network.bssid,asSta,6) == NULL)
|
|
{
|
|
//ShuChen TODO: change media status.
|
|
//ShuChen TODO: What to do when disassociate.
|
|
priv->ieee80211->state = IEEE80211_NOLINK;
|
|
for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x22;
|
|
priv->OpMode = RT_OP_MODE_NO_LINK;
|
|
{
|
|
RT_OP_MODE OpMode = priv->OpMode;
|
|
u8 btMsr = read_nic_byte(priv, MSR);
|
|
|
|
btMsr &= 0xfc;
|
|
|
|
switch(OpMode)
|
|
{
|
|
case RT_OP_MODE_INFRASTRUCTURE:
|
|
btMsr |= MSR_LINK_MANAGED;
|
|
break;
|
|
|
|
case RT_OP_MODE_IBSS:
|
|
btMsr |= MSR_LINK_ADHOC;
|
|
// led link set separate
|
|
break;
|
|
|
|
case RT_OP_MODE_AP:
|
|
btMsr |= MSR_LINK_MASTER;
|
|
break;
|
|
|
|
default:
|
|
btMsr |= MSR_LINK_NONE;
|
|
break;
|
|
}
|
|
|
|
write_nic_byte(priv, MSR, btMsr);
|
|
}
|
|
ieee80211_disassociate(priv->ieee80211);
|
|
|
|
write_nic_word(priv, BSSIDR, ((u16*)priv->ieee80211->current_network.bssid)[0]);
|
|
write_nic_dword(priv, BSSIDR+2, ((u32*)(priv->ieee80211->current_network.bssid+2))[0]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
static void MgntDisconnectAP(struct r8192_priv *priv, u8 asRsn)
|
|
{
|
|
bool bFilterOutNonAssociatedBSSID = false;
|
|
u32 RegRCR, Type;
|
|
|
|
/* If disconnect, clear RCR CBSSID bit */
|
|
bFilterOutNonAssociatedBSSID = false;
|
|
|
|
Type = bFilterOutNonAssociatedBSSID;
|
|
RegRCR = read_nic_dword(priv, RCR);
|
|
priv->ReceiveConfig = RegRCR;
|
|
|
|
if (Type == true)
|
|
RegRCR |= (RCR_CBSSID);
|
|
else if (Type == false)
|
|
RegRCR &= (~RCR_CBSSID);
|
|
|
|
write_nic_dword(priv, RCR, RegRCR);
|
|
priv->ReceiveConfig = RegRCR;
|
|
|
|
MlmeDisassociateRequest(priv, priv->ieee80211->current_network.bssid, asRsn);
|
|
|
|
priv->ieee80211->state = IEEE80211_NOLINK;
|
|
}
|
|
|
|
|
|
static bool MgntDisconnect(struct r8192_priv *priv, u8 asRsn)
|
|
{
|
|
// In adhoc mode, update beacon frame.
|
|
if( priv->ieee80211->state == IEEE80211_LINKED )
|
|
{
|
|
if( priv->ieee80211->iw_mode == IW_MODE_ADHOC )
|
|
{
|
|
MgntDisconnectIBSS(priv);
|
|
}
|
|
if( priv->ieee80211->iw_mode == IW_MODE_INFRA )
|
|
{
|
|
// We clear key here instead of MgntDisconnectAP() because that
|
|
// MgntActSet_802_11_DISASSOCIATE() is an interface called by OS,
|
|
// e.g. OID_802_11_DISASSOCIATE in Windows while as MgntDisconnectAP() is
|
|
// used to handle disassociation related things to AP, e.g. send Disassoc
|
|
// frame to AP. 2005.01.27, by rcnjko.
|
|
MgntDisconnectAP(priv, asRsn);
|
|
}
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
//
|
|
// Description:
|
|
// Chang RF Power State.
|
|
// Note that, only MgntActSet_RF_State() is allowed to set HW_VAR_RF_STATE.
|
|
//
|
|
// Assumption:
|
|
// PASSIVE LEVEL.
|
|
//
|
|
bool MgntActSet_RF_State(struct r8192_priv *priv, RT_RF_POWER_STATE StateToSet,
|
|
RT_RF_CHANGE_SOURCE ChangeSource)
|
|
{
|
|
bool bActionAllowed = false;
|
|
bool bConnectBySSID = false;
|
|
RT_RF_POWER_STATE rtState;
|
|
|
|
RT_TRACE(COMP_POWER, "===>MgntActSet_RF_State(): StateToSet(%d)\n",StateToSet);
|
|
|
|
spin_lock(&priv->rf_ps_lock);
|
|
|
|
rtState = priv->eRFPowerState;
|
|
|
|
switch(StateToSet)
|
|
{
|
|
case eRfOn:
|
|
priv->RfOffReason &= (~ChangeSource);
|
|
|
|
if (!priv->RfOffReason)
|
|
{
|
|
priv->RfOffReason = 0;
|
|
bActionAllowed = true;
|
|
|
|
|
|
if(rtState == eRfOff && ChangeSource >=RF_CHANGE_BY_HW )
|
|
{
|
|
bConnectBySSID = true;
|
|
}
|
|
}
|
|
else
|
|
RT_TRACE(COMP_POWER, "MgntActSet_RF_State - eRfon reject pMgntInfo->RfOffReason= 0x%x, ChangeSource=0x%X\n", priv->RfOffReason, ChangeSource);
|
|
|
|
break;
|
|
|
|
case eRfOff:
|
|
|
|
if (priv->RfOffReason > RF_CHANGE_BY_IPS)
|
|
{
|
|
// Disconnect to current BSS when radio off. Asked by QuanTa.
|
|
MgntDisconnect(priv, disas_lv_ss);
|
|
}
|
|
|
|
priv->RfOffReason |= ChangeSource;
|
|
bActionAllowed = true;
|
|
break;
|
|
|
|
case eRfSleep:
|
|
priv->RfOffReason |= ChangeSource;
|
|
bActionAllowed = true;
|
|
break;
|
|
}
|
|
|
|
if (bActionAllowed)
|
|
{
|
|
RT_TRACE(COMP_POWER, "MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, priv->RfOffReason);
|
|
// Config HW to the specified mode.
|
|
SetRFPowerState8190(priv, StateToSet);
|
|
}
|
|
else
|
|
{
|
|
RT_TRACE(COMP_POWER, "MgntActSet_RF_State(): Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n", StateToSet, ChangeSource, priv->RfOffReason);
|
|
}
|
|
|
|
// Release RF spinlock
|
|
spin_unlock(&priv->rf_ps_lock);
|
|
|
|
RT_TRACE(COMP_POWER, "<===MgntActSet_RF_State()\n");
|
|
return bActionAllowed;
|
|
}
|
|
|
|
|