30cbc22217
ppc can boot one single binary on prep, chrp and pmac boards. ppc64 can boot one single binary on pseries and G5 boards. pmac has no legacy io, probing for PC style legacy hardware (or accessing the legacy io area regulary) may lead to a hard crash: * add check for parport_pc, exit on pmac. 32bit chrp has no ->check_legacy_ioport, the probe is always called. 64bit chrp has check_legacy_ioport, check for a "parallel" node * add check for isapnp, only PReP boards may have real ISA slots. 32bit PReP will have no ->check_legacy_ioport, the probe is always called. * update code in i8042_platform_init. Run ->check_legacy_ioport first, always call request_region. No functional change. Remove whitespace before i8042_reset init. Signed-off-by: Olaf Hering <olaf@aepfle.de> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Adam Belay <ambx1@neo.rr.com> Cc: Dmitry Torokhov <dtor@mail.ru> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
456 lines
14 KiB
C
456 lines
14 KiB
C
#ifndef _ASM_POWERPC_IO_H
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#define _ASM_POWERPC_IO_H
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#ifdef __KERNEL__
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/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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/* Check of existence of legacy devices */
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extern int check_legacy_ioport(unsigned long base_port);
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#define PARALLEL_BASE 0x378
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#define PNPBIOS_BASE 0xf000 /* only relevant for PReP */
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#ifndef CONFIG_PPC64
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#include <asm-ppc/io.h>
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#else
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#include <linux/compiler.h>
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#include <asm/page.h>
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#include <asm/byteorder.h>
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#include <asm/paca.h>
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#include <asm/synch.h>
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#include <asm/delay.h>
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#include <asm-generic/iomap.h>
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#define SIO_CONFIG_RA 0x398
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#define SIO_CONFIG_RD 0x399
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#define SLOW_DOWN_IO
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extern unsigned long isa_io_base;
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extern unsigned long pci_io_base;
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#ifdef CONFIG_PPC_ISERIES
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extern int in_8(const volatile unsigned char __iomem *addr);
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extern void out_8(volatile unsigned char __iomem *addr, int val);
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extern int in_le16(const volatile unsigned short __iomem *addr);
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extern int in_be16(const volatile unsigned short __iomem *addr);
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extern void out_le16(volatile unsigned short __iomem *addr, int val);
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extern void out_be16(volatile unsigned short __iomem *addr, int val);
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extern unsigned in_le32(const volatile unsigned __iomem *addr);
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extern unsigned in_be32(const volatile unsigned __iomem *addr);
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extern void out_le32(volatile unsigned __iomem *addr, int val);
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extern void out_be32(volatile unsigned __iomem *addr, int val);
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extern unsigned long in_le64(const volatile unsigned long __iomem *addr);
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extern unsigned long in_be64(const volatile unsigned long __iomem *addr);
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extern void out_le64(volatile unsigned long __iomem *addr, unsigned long val);
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extern void out_be64(volatile unsigned long __iomem *addr, unsigned long val);
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extern unsigned char __raw_readb(const volatile void __iomem *addr);
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extern unsigned short __raw_readw(const volatile void __iomem *addr);
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extern unsigned int __raw_readl(const volatile void __iomem *addr);
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extern unsigned long __raw_readq(const volatile void __iomem *addr);
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extern void __raw_writeb(unsigned char v, volatile void __iomem *addr);
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extern void __raw_writew(unsigned short v, volatile void __iomem *addr);
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extern void __raw_writel(unsigned int v, volatile void __iomem *addr);
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extern void __raw_writeq(unsigned long v, volatile void __iomem *addr);
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extern void memset_io(volatile void __iomem *addr, int c, unsigned long n);
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extern void memcpy_fromio(void *dest, const volatile void __iomem *src,
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unsigned long n);
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extern void memcpy_toio(volatile void __iomem *dest, const void *src,
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unsigned long n);
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#else /* CONFIG_PPC_ISERIES */
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#define in_8(addr) __in_8((addr))
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#define out_8(addr, val) __out_8((addr), (val))
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#define in_le16(addr) __in_le16((addr))
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#define in_be16(addr) __in_be16((addr))
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#define out_le16(addr, val) __out_le16((addr), (val))
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#define out_be16(addr, val) __out_be16((addr), (val))
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#define in_le32(addr) __in_le32((addr))
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#define in_be32(addr) __in_be32((addr))
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#define out_le32(addr, val) __out_le32((addr), (val))
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#define out_be32(addr, val) __out_be32((addr), (val))
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#define in_le64(addr) __in_le64((addr))
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#define in_be64(addr) __in_be64((addr))
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#define out_le64(addr, val) __out_le64((addr), (val))
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#define out_be64(addr, val) __out_be64((addr), (val))
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static inline unsigned char __raw_readb(const volatile void __iomem *addr)
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{
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return *(volatile unsigned char __force *)addr;
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}
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static inline unsigned short __raw_readw(const volatile void __iomem *addr)
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{
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return *(volatile unsigned short __force *)addr;
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}
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static inline unsigned int __raw_readl(const volatile void __iomem *addr)
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{
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return *(volatile unsigned int __force *)addr;
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}
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static inline unsigned long __raw_readq(const volatile void __iomem *addr)
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{
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return *(volatile unsigned long __force *)addr;
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}
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static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
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{
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*(volatile unsigned char __force *)addr = v;
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}
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static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
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{
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*(volatile unsigned short __force *)addr = v;
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}
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static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
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{
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*(volatile unsigned int __force *)addr = v;
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}
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static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
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{
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*(volatile unsigned long __force *)addr = v;
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}
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#define memset_io(a,b,c) eeh_memset_io((a),(b),(c))
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#define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c))
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#define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c))
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#endif /* CONFIG_PPC_ISERIES */
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/*
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* The insw/outsw/insl/outsl macros don't do byte-swapping.
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* They are only used in practice for transferring buffers which
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* are arrays of bytes, and byte-swapping is not appropriate in
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* that case. - paulus */
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#define insb(port, buf, ns) eeh_insb((port), (buf), (ns))
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#define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
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#define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
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#define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
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#define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
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#define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
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#define readb(addr) eeh_readb(addr)
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#define readw(addr) eeh_readw(addr)
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#define readl(addr) eeh_readl(addr)
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#define readq(addr) eeh_readq(addr)
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#define writeb(data, addr) eeh_writeb((data), (addr))
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#define writew(data, addr) eeh_writew((data), (addr))
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#define writel(data, addr) eeh_writel((data), (addr))
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#define writeq(data, addr) eeh_writeq((data), (addr))
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#define inb(port) eeh_inb((unsigned long)port)
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#define outb(val, port) eeh_outb(val, (unsigned long)port)
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#define inw(port) eeh_inw((unsigned long)port)
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#define outw(val, port) eeh_outw(val, (unsigned long)port)
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#define inl(port) eeh_inl((unsigned long)port)
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#define outl(val, port) eeh_outl(val, (unsigned long)port)
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#define readb_relaxed(addr) readb(addr)
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#define readw_relaxed(addr) readw(addr)
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#define readl_relaxed(addr) readl(addr)
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#define readq_relaxed(addr) readq(addr)
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extern void _insb(volatile u8 __iomem *port, void *buf, long count);
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extern void _outsb(volatile u8 __iomem *port, const void *buf, long count);
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extern void _insw_ns(volatile u16 __iomem *port, void *buf, long count);
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extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count);
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extern void _insl_ns(volatile u32 __iomem *port, void *buf, long count);
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extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count);
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static inline void mmiowb(void)
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{
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__asm__ __volatile__ ("sync" : : : "memory");
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get_paca()->io_sync = 0;
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}
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/*
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* output pause versions need a delay at least for the
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* w83c105 ide controller in a p610.
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*/
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#define inb_p(port) inb(port)
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#define outb_p(val, port) (udelay(1), outb((val), (port)))
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#define inw_p(port) inw(port)
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#define outw_p(val, port) (udelay(1), outw((val), (port)))
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#define inl_p(port) inl(port)
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#define outl_p(val, port) (udelay(1), outl((val), (port)))
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#define IO_SPACE_LIMIT ~(0UL)
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extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
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unsigned long size, unsigned long flags);
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extern void __iomem *__ioremap(unsigned long address, unsigned long size,
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unsigned long flags);
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/**
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* ioremap - map bus memory into CPU space
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* @address: bus address of the memory
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* @size: size of the resource to map
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*
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* ioremap performs a platform specific sequence of operations to
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* make bus memory CPU accessible via the readb/readw/readl/writeb/
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* writew/writel functions and the other mmio helpers. The returned
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* address is not guaranteed to be usable directly as a virtual
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* address.
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*/
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extern void __iomem *ioremap(unsigned long address, unsigned long size);
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#define ioremap_nocache(addr, size) ioremap((addr), (size))
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extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size);
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extern void iounmap(volatile void __iomem *addr);
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extern void __iomem * reserve_phb_iospace(unsigned long size);
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/**
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* virt_to_phys - map virtual addresses to physical
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* @address: address to remap
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*
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* The returned physical address is the physical (CPU) mapping for
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* the memory address given. It is only valid to use this function on
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* addresses directly mapped or allocated via kmalloc.
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*
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* This function does not give bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline unsigned long virt_to_phys(volatile void * address)
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{
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return __pa((unsigned long)address);
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}
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/**
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* phys_to_virt - map physical address to virtual
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* @address: address to remap
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*
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* The returned virtual address is a current CPU mapping for
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* the memory address given. It is only valid to use this function on
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* addresses that have a kernel mapping
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*
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* This function does not handle bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline void * phys_to_virt(unsigned long address)
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{
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return (void *)__va(address);
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}
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/*
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* Change "struct page" to physical address.
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*/
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#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
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/* We do NOT want virtual merging, it would put too much pressure on
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* our iommu allocator. Instead, we want drivers to be smart enough
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* to coalesce sglists that happen to have been mapped in a contiguous
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* way by the iommu
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*/
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#define BIO_VMERGE_BOUNDARY 0
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static inline void iosync(void)
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{
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__asm__ __volatile__ ("sync" : : : "memory");
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}
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/* Enforce in-order execution of data I/O.
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* No distinction between read/write on PPC; use eieio for all three.
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*/
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#define iobarrier_rw() eieio()
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#define iobarrier_r() eieio()
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#define iobarrier_w() eieio()
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/*
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* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
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* These routines do not perform EEH-related I/O address translation,
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* and should not be used directly by device drivers. Use inb/readb
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* instead.
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*/
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static inline int __in_8(const volatile unsigned char __iomem *addr)
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{
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int ret;
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__asm__ __volatile__("sync; lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "m" (*addr));
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return ret;
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}
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static inline void __out_8(volatile unsigned char __iomem *addr, int val)
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{
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__asm__ __volatile__("sync; stb%U0%X0 %1,%0"
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: "=m" (*addr) : "r" (val));
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get_paca()->io_sync = 1;
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}
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static inline int __in_le16(const volatile unsigned short __iomem *addr)
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{
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int ret;
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__asm__ __volatile__("sync; lhbrx %0,0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "r" (addr), "m" (*addr));
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return ret;
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}
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static inline int __in_be16(const volatile unsigned short __iomem *addr)
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{
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int ret;
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__asm__ __volatile__("sync; lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "m" (*addr));
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return ret;
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}
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static inline void __out_le16(volatile unsigned short __iomem *addr, int val)
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{
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__asm__ __volatile__("sync; sthbrx %1,0,%2"
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: "=m" (*addr) : "r" (val), "r" (addr));
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get_paca()->io_sync = 1;
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}
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static inline void __out_be16(volatile unsigned short __iomem *addr, int val)
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{
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__asm__ __volatile__("sync; sth%U0%X0 %1,%0"
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: "=m" (*addr) : "r" (val));
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get_paca()->io_sync = 1;
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}
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static inline unsigned __in_le32(const volatile unsigned __iomem *addr)
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{
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unsigned ret;
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__asm__ __volatile__("sync; lwbrx %0,0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "r" (addr), "m" (*addr));
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return ret;
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}
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static inline unsigned __in_be32(const volatile unsigned __iomem *addr)
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{
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unsigned ret;
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__asm__ __volatile__("sync; lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "m" (*addr));
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return ret;
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}
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static inline void __out_le32(volatile unsigned __iomem *addr, int val)
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{
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__asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr)
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: "r" (val), "r" (addr));
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get_paca()->io_sync = 1;
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}
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static inline void __out_be32(volatile unsigned __iomem *addr, int val)
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{
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__asm__ __volatile__("sync; stw%U0%X0 %1,%0"
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: "=m" (*addr) : "r" (val));
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get_paca()->io_sync = 1;
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}
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static inline unsigned long __in_le64(const volatile unsigned long __iomem *addr)
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{
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unsigned long tmp, ret;
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__asm__ __volatile__(
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"sync\n"
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"ld %1,0(%2)\n"
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"twi 0,%1,0\n"
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"isync\n"
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"rldimi %0,%1,5*8,1*8\n"
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"rldimi %0,%1,3*8,2*8\n"
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"rldimi %0,%1,1*8,3*8\n"
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"rldimi %0,%1,7*8,4*8\n"
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"rldicl %1,%1,32,0\n"
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"rlwimi %0,%1,8,8,31\n"
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"rlwimi %0,%1,24,16,23\n"
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: "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr));
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return ret;
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}
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static inline unsigned long __in_be64(const volatile unsigned long __iomem *addr)
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{
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unsigned long ret;
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__asm__ __volatile__("sync; ld%U1%X1 %0,%1; twi 0,%0,0; isync"
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: "=r" (ret) : "m" (*addr));
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return ret;
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}
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static inline void __out_le64(volatile unsigned long __iomem *addr, unsigned long val)
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{
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unsigned long tmp;
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__asm__ __volatile__(
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"rldimi %0,%1,5*8,1*8\n"
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"rldimi %0,%1,3*8,2*8\n"
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"rldimi %0,%1,1*8,3*8\n"
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"rldimi %0,%1,7*8,4*8\n"
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"rldicl %1,%1,32,0\n"
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"rlwimi %0,%1,8,8,31\n"
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"rlwimi %0,%1,24,16,23\n"
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"sync\n"
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"std %0,0(%3)"
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: "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr));
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get_paca()->io_sync = 1;
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}
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static inline void __out_be64(volatile unsigned long __iomem *addr, unsigned long val)
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{
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__asm__ __volatile__("sync; std%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
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get_paca()->io_sync = 1;
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}
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#include <asm/eeh.h>
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/**
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* check_signature - find BIOS signatures
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* @io_addr: mmio address to check
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* @signature: signature block
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* @length: length of signature
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*
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* Perform a signature comparison with the mmio address io_addr. This
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* address should have been obtained by ioremap.
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* Returns 1 on a match.
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*/
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static inline int check_signature(const volatile void __iomem * io_addr,
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const unsigned char *signature, int length)
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{
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int retval = 0;
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do {
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if (readb(io_addr) != *signature)
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goto out;
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io_addr++;
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signature++;
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length--;
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} while (length);
|
|
retval = 1;
|
|
out:
|
|
return retval;
|
|
}
|
|
|
|
/* Nothing to do */
|
|
|
|
#define dma_cache_inv(_start,_size) do { } while (0)
|
|
#define dma_cache_wback(_start,_size) do { } while (0)
|
|
#define dma_cache_wback_inv(_start,_size) do { } while (0)
|
|
|
|
|
|
/*
|
|
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
|
|
* access
|
|
*/
|
|
#define xlate_dev_mem_ptr(p) __va(p)
|
|
|
|
/*
|
|
* Convert a virtual cached pointer to an uncached pointer
|
|
*/
|
|
#define xlate_dev_kmem_ptr(p) p
|
|
|
|
#endif /* __KERNEL__ */
|
|
|
|
#endif /* CONFIG_PPC64 */
|
|
#endif /* _ASM_POWERPC_IO_H */
|