4e57b68178
I recently picked up my older work to remove unnecessary #includes of sched.h, starting from a patch by Dave Jones to not include sched.h from module.h. This reduces the number of indirect includes of sched.h by ~300. Another ~400 pointless direct includes can be removed after this disentangling (patch to follow later). However, quite a few indirect includes need to be fixed up for this. In order to feed the patches through -mm with as little disturbance as possible, I've split out the fixes I accumulated up to now (complete for i386 and x86_64, more archs to follow later) and post them before the real patch. This way this large part of the patch is kept simple with only adding #includes, and all hunks are independent of each other. So if any hunk rejects or gets in the way of other patches, just drop it. My scripts will pick it up again in the next round. Signed-off-by: Tim Schmielau <tim@physik3.uni-rostock.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
111 lines
2.6 KiB
C
111 lines
2.6 KiB
C
#include <linux/module.h>
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#include <linux/smp.h>
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#include <linux/time.h>
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#include <linux/errno.h>
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#include <linux/timex.h>
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#include <asm/io.h>
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/* IBM Summit (EXA) Cyclone counter code*/
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#define CYCLONE_CBAR_ADDR 0xFEB00CD0
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#define CYCLONE_PMCC_OFFSET 0x51A0
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#define CYCLONE_MPMC_OFFSET 0x51D0
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#define CYCLONE_MPCS_OFFSET 0x51A8
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#define CYCLONE_TIMER_FREQ 100000000
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int use_cyclone;
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void __init cyclone_setup(void)
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{
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use_cyclone = 1;
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}
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struct time_interpolator cyclone_interpolator = {
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.source = TIME_SOURCE_MMIO64,
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.shift = 16,
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.frequency = CYCLONE_TIMER_FREQ,
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.drift = -100,
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.mask = (1LL << 40) - 1
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};
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int __init init_cyclone_clock(void)
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{
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u64* reg;
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u64 base; /* saved cyclone base address */
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u64 offset; /* offset from pageaddr to cyclone_timer register */
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int i;
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u32* volatile cyclone_timer; /* Cyclone MPMC0 register */
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if (!use_cyclone)
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return -ENODEV;
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printk(KERN_INFO "Summit chipset: Starting Cyclone Counter.\n");
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/* find base address */
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offset = (CYCLONE_CBAR_ADDR);
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reg = (u64*)ioremap_nocache(offset, sizeof(u64));
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if(!reg){
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printk(KERN_ERR "Summit chipset: Could not find valid CBAR register.\n");
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use_cyclone = 0;
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return -ENODEV;
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}
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base = readq(reg);
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if(!base){
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printk(KERN_ERR "Summit chipset: Could not find valid CBAR value.\n");
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use_cyclone = 0;
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return -ENODEV;
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}
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iounmap(reg);
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/* setup PMCC */
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offset = (base + CYCLONE_PMCC_OFFSET);
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reg = (u64*)ioremap_nocache(offset, sizeof(u64));
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if(!reg){
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printk(KERN_ERR "Summit chipset: Could not find valid PMCC register.\n");
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use_cyclone = 0;
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return -ENODEV;
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}
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writel(0x00000001,reg);
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iounmap(reg);
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/* setup MPCS */
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offset = (base + CYCLONE_MPCS_OFFSET);
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reg = (u64*)ioremap_nocache(offset, sizeof(u64));
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if(!reg){
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printk(KERN_ERR "Summit chipset: Could not find valid MPCS register.\n");
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use_cyclone = 0;
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return -ENODEV;
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}
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writel(0x00000001,reg);
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iounmap(reg);
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/* map in cyclone_timer */
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offset = (base + CYCLONE_MPMC_OFFSET);
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cyclone_timer = (u32*)ioremap_nocache(offset, sizeof(u32));
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if(!cyclone_timer){
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printk(KERN_ERR "Summit chipset: Could not find valid MPMC register.\n");
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use_cyclone = 0;
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return -ENODEV;
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}
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/*quick test to make sure its ticking*/
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for(i=0; i<3; i++){
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u32 old = readl(cyclone_timer);
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int stall = 100;
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while(stall--) barrier();
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if(readl(cyclone_timer) == old){
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printk(KERN_ERR "Summit chipset: Counter not counting! DISABLED\n");
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iounmap(cyclone_timer);
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cyclone_timer = 0;
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use_cyclone = 0;
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return -ENODEV;
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}
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}
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/* initialize last tick */
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cyclone_interpolator.addr = cyclone_timer;
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register_time_interpolator(&cyclone_interpolator);
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return 0;
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}
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__initcall(init_cyclone_clock);
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