The code that prints the cache size assumes that L3 always lives in chipset and is shared across CPUs. Which is not really true. I think all the cachesizes reported by cpuid are in the processor itself. The attached patch changes the code to reflect that. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org> |
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boot | ||
crypto | ||
kernel | ||
lib | ||
mach-default | ||
mach-es7000 | ||
mach-generic | ||
mach-visws | ||
mach-voyager | ||
math-emu | ||
mm | ||
oprofile | ||
pci | ||
power | ||
defconfig | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |