867e359b97
This change is the core kernel support for TILEPro and TILE64 chips. No driver support (except the console driver) is included yet. This includes the relevant Linux headers in asm/; the low-level low-level "Tile architecture" headers in arch/, which are shared with the hypervisor, etc., and are build-system agnostic; and the relevant hypervisor headers in hv/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Reviewed-by: Paul Mundt <lethal@linux-sh.org>
39 lines
1.2 KiB
C
39 lines
1.2 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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/**
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* @file drv_pcie_rc_intf.h
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* Interface definitions for the PCIE Root Complex.
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*/
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#ifndef _SYS_HV_DRV_PCIE_RC_INTF_H
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#define _SYS_HV_DRV_PCIE_RC_INTF_H
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/** File offset for reading the interrupt base number used for PCIE legacy
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interrupts and PLX Gen 1 requirement flag */
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#define PCIE_RC_CONFIG_MASK_OFF 0
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/**
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* Structure used for obtaining PCIe config information, read from the PCIE
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* subsystem /ctl file at initialization
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*/
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typedef struct pcie_rc_config
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{
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int intr; /**< interrupt number used for downcall */
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int plx_gen1; /**< flag for PLX Gen 1 configuration */
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} pcie_rc_config_t;
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#endif /* _SYS_HV_DRV_PCIE_RC_INTF_H */
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