93ea02bb84
We're going to be adding a few new barrier primitives, and in order to avoid endless duplication make more agressive use of asm-generic/barrier.h. Change the asm-generic/barrier.h such that it allows partial barrier definitions and fills out the rest with defaults. There are a few architectures (m32r, m68k) that could probably do away with their barrier.h file entirely but are kept for now due to their unconventional nop() implementation. Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Michael Neuling <mikey@neuling.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Victor Kaplansky <VICTORK@il.ibm.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Link: http://lkml.kernel.org/r/20131213150640.846368594@infradead.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
79 lines
2.0 KiB
C
79 lines
2.0 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_BARRIER_H
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#define _ASM_TILE_BARRIER_H
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#include <arch/chip.h>
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#include <arch/spr_def.h>
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#include <asm/timex.h>
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#define __sync() __insn_mf()
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#include <hv/syscall_public.h>
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/*
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* Issue an uncacheable load to each memory controller, then
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* wait until those loads have completed.
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*/
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static inline void __mb_incoherent(void)
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{
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long clobber_r10;
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asm volatile("swint2"
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: "=R10" (clobber_r10)
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: "R10" (HV_SYS_fence_incoherent)
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: "r0", "r1", "r2", "r3", "r4",
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"r5", "r6", "r7", "r8", "r9",
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"r11", "r12", "r13", "r14",
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"r15", "r16", "r17", "r18", "r19",
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"r20", "r21", "r22", "r23", "r24",
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"r25", "r26", "r27", "r28", "r29");
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}
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/* Fence to guarantee visibility of stores to incoherent memory. */
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static inline void
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mb_incoherent(void)
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{
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__insn_mf();
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{
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#if CHIP_HAS_TILE_WRITE_PENDING()
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const unsigned long WRITE_TIMEOUT_CYCLES = 400;
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unsigned long start = get_cycles_low();
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do {
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if (__insn_mfspr(SPR_TILE_WRITE_PENDING) == 0)
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return;
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} while ((get_cycles_low() - start) < WRITE_TIMEOUT_CYCLES);
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#endif /* CHIP_HAS_TILE_WRITE_PENDING() */
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(void) __mb_incoherent();
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}
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}
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#define fast_wmb() __sync()
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#define fast_rmb() __sync()
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#define fast_mb() __sync()
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#define fast_iob() mb_incoherent()
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#define wmb() fast_wmb()
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#define rmb() fast_rmb()
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#define mb() fast_mb()
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#define iob() fast_iob()
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#include <asm-generic/barrier.h>
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_TILE_BARRIER_H */
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