kernel-ark/include/asm-sparc/psr.h
David S. Miller 28e6103665 sparc: Fix debugger syscall restart interactions.
So, forever, we've had this ptrace_signal_deliver implementation
which tries to handle all of the nasties that can occur when the
debugger looks at a process about to take a signal.  It's meant
to address all of these issues inside of the kernel so that the
debugger need not be mindful of such things.

Problem is, this doesn't work.

The idea was that we should do the syscall restart business first, so
that the debugger captures that state.  Otherwise, if the debugger for
example saves the child's state, makes the child execute something
else, then restores the saved state, we won't handle the syscall
restart properly because we lose the "we're in a syscall" state.

The code here worked for most cases, but if the debugger actually
passes the signal through to the child unaltered, it's possible that
we would do a syscall restart when we shouldn't have.

In particular this breaks the case of debugging a process under a gdb
which is being debugged by yet another gdb.  gdb uses sigsuspend
to wait for SIGCHLD of the inferior, but if gdb itself is being
debugged by a top-level gdb we get a ptrace_stop().  The top-level gdb
does a PTRACE_CONT with SIGCHLD to let the inferior gdb see the
signal.  But ptrace_signal_deliver() assumed the debugger would cancel
out the signal and therefore did a syscall restart, because the return
error was ERESTARTNOHAND.

Fix this by simply making ptrace_signal_deliver() a nop, and providing
a way for the debugger to control system call restarting properly:

1) Report a "in syscall" software bit in regs->{tstate,psr}.
   It is set early on in trap entry to a system call and is fully
   visible to the debugger via ptrace() and regsets.

2) Test this bit right before doing a syscall restart.  We have
   to do a final recheck right after get_signal_to_deliver() in
   case the debugger cleared the bit during ptrace_stop().

3) Clear the bit in trap return so we don't accidently try to set
   that bit in the real register.

As a result we also get a ptrace_{is,clear}_syscall() for sparc32 just
like sparc64 has.

M68K has this same exact bug, and is now the only other user of the
ptrace_signal_deliver hook.  It needs to be fixed in the same exact
way as sparc.

Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-11 02:07:19 -07:00

94 lines
2.9 KiB
C

/* $Id: psr.h,v 1.15 1997/10/04 08:54:22 ecd Exp $
* psr.h: This file holds the macros for masking off various parts of
* the processor status register on the Sparc. This is valid
* for Version 8. On the V9 this is renamed to the PSTATE
* register and its members are accessed as fields like
* PSTATE.PRIV for the current CPU privilege level.
*
* Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
*/
#ifndef __LINUX_SPARC_PSR_H
#define __LINUX_SPARC_PSR_H
/* The Sparc PSR fields are laid out as the following:
*
* ------------------------------------------------------------------------
* | impl | vers | icc | resv | EC | EF | PIL | S | PS | ET | CWP |
* | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 |
* ------------------------------------------------------------------------
*/
#define PSR_CWP 0x0000001f /* current window pointer */
#define PSR_ET 0x00000020 /* enable traps field */
#define PSR_PS 0x00000040 /* previous privilege level */
#define PSR_S 0x00000080 /* current privilege level */
#define PSR_PIL 0x00000f00 /* processor interrupt level */
#define PSR_EF 0x00001000 /* enable floating point */
#define PSR_EC 0x00002000 /* enable co-processor */
#define PSR_SYSCALL 0x00004000 /* inside of a syscall */
#define PSR_LE 0x00008000 /* SuperSparcII little-endian */
#define PSR_ICC 0x00f00000 /* integer condition codes */
#define PSR_C 0x00100000 /* carry bit */
#define PSR_V 0x00200000 /* overflow bit */
#define PSR_Z 0x00400000 /* zero bit */
#define PSR_N 0x00800000 /* negative bit */
#define PSR_VERS 0x0f000000 /* cpu-version field */
#define PSR_IMPL 0xf0000000 /* cpu-implementation field */
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
/* Get the %psr register. */
static inline unsigned int get_psr(void)
{
unsigned int psr;
__asm__ __volatile__(
"rd %%psr, %0\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
: "=r" (psr)
: /* no inputs */
: "memory");
return psr;
}
static inline void put_psr(unsigned int new_psr)
{
__asm__ __volatile__(
"wr %0, 0x0, %%psr\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
: /* no outputs */
: "r" (new_psr)
: "memory", "cc");
}
/* Get the %fsr register. Be careful, make sure the floating point
* enable bit is set in the %psr when you execute this or you will
* incur a trap.
*/
extern unsigned int fsr_storage;
static inline unsigned int get_fsr(void)
{
unsigned int fsr = 0;
__asm__ __volatile__(
"st %%fsr, %1\n\t"
"ld %1, %0\n\t"
: "=r" (fsr)
: "m" (fsr_storage));
return fsr;
}
#endif /* !(__ASSEMBLY__) */
#endif /* (__KERNEL__) */
#endif /* !(__LINUX_SPARC_PSR_H) */