6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
165 lines
3.5 KiB
C
165 lines
3.5 KiB
C
/*
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* linux/arch/arm26/mach-arc/irq.c
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*
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* Copyright (C) 1996 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Changelog:
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* 24-09-1996 RMK Created
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* 10-10-1996 RMK Brought up to date with arch-sa110eval
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* 22-10-1996 RMK Changed interrupt numbers & uses new inb/outb macros
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* 11-01-1998 RMK Added mask_and_ack_irq
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* 22-08-1998 RMK Restructured IRQ routines
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* 08-09-2002 IM Brought up to date for 2.5
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* 01-06-2003 JMA Removed arc_fiq_chip
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*/
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#include <linux/init.h>
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#include <asm/irq.h>
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#include <asm/irqchip.h>
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#include <asm/ioc.h>
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#include <asm/io.h>
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#include <asm/system.h>
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extern void init_FIQ(void);
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#define a_clf() clf()
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#define a_stf() stf()
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static void arc_ack_irq_a(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << irq;
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a_clf();
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val = ioc_readb(IOC_IRQMASKA);
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ioc_writeb(val & ~mask, IOC_IRQMASKA);
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ioc_writeb(mask, IOC_IRQCLRA);
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a_stf();
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}
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static void arc_mask_irq_a(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << irq;
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a_clf();
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val = ioc_readb(IOC_IRQMASKA);
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ioc_writeb(val & ~mask, IOC_IRQMASKA);
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a_stf();
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}
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static void arc_unmask_irq_a(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << irq;
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a_clf();
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val = ioc_readb(IOC_IRQMASKA);
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ioc_writeb(val | mask, IOC_IRQMASKA);
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a_stf();
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}
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static struct irqchip arc_a_chip = {
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.ack = arc_ack_irq_a,
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.mask = arc_mask_irq_a,
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.unmask = arc_unmask_irq_a,
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};
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static void arc_mask_irq_b(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << (irq & 7);
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val = ioc_readb(IOC_IRQMASKB);
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ioc_writeb(val & ~mask, IOC_IRQMASKB);
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}
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static void arc_unmask_irq_b(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << (irq & 7);
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val = ioc_readb(IOC_IRQMASKB);
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ioc_writeb(val | mask, IOC_IRQMASKB);
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}
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static struct irqchip arc_b_chip = {
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.ack = arc_mask_irq_b,
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.mask = arc_mask_irq_b,
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.unmask = arc_unmask_irq_b,
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};
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/* FIXME - JMA none of these functions are used in arm26 currently
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static void arc_mask_irq_fiq(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << (irq & 7);
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val = ioc_readb(IOC_FIQMASK);
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ioc_writeb(val & ~mask, IOC_FIQMASK);
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}
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static void arc_unmask_irq_fiq(unsigned int irq)
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{
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unsigned int val, mask;
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mask = 1 << (irq & 7);
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val = ioc_readb(IOC_FIQMASK);
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ioc_writeb(val | mask, IOC_FIQMASK);
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}
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static struct irqchip arc_fiq_chip = {
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.ack = arc_mask_irq_fiq,
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.mask = arc_mask_irq_fiq,
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.unmask = arc_unmask_irq_fiq,
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};
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*/
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void __init arc_init_irq(void)
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{
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unsigned int irq, flags;
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/* Disable all IOC interrupt sources */
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ioc_writeb(0, IOC_IRQMASKA);
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ioc_writeb(0, IOC_IRQMASKB);
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ioc_writeb(0, IOC_FIQMASK);
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for (irq = 0; irq < NR_IRQS; irq++) {
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flags = IRQF_VALID;
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if (irq <= 6 || (irq >= 9 && irq <= 15))
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flags |= IRQF_PROBE;
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if (irq == IRQ_KEYBOARDTX)
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flags |= IRQF_NOAUTOEN;
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switch (irq) {
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case 0 ... 7:
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set_irq_chip(irq, &arc_a_chip);
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set_irq_handler(irq, do_level_IRQ);
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set_irq_flags(irq, flags);
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break;
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case 8 ... 15:
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set_irq_chip(irq, &arc_b_chip);
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set_irq_handler(irq, do_level_IRQ);
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set_irq_flags(irq, flags);
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/* case 64 ... 72:
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set_irq_chip(irq, &arc_fiq_chip);
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set_irq_flags(irq, flags);
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break;
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*/
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}
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}
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irq_desc[IRQ_KEYBOARDTX].noautoenable = 1;
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init_FIQ();
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}
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