2acd089471
HDQ/1-wire registers are 32 bits long, even if the register contents fit into 8 bits, so accesses must be 32-bit aligned. Evidently the OMAP2/3 interconnects allowed the driver to get away with 8 bit accesses, but the OMAP4 puts a stop to that: [ 1.488800] Driver for 1-wire Dallas network protocol. [ 1.495025] Bad mode in data abort handler detected [ 1.500122] Internal error: Oops - bad mode: 0 [#1] SMP [ 1.505615] Modules linked in: [ 1.508819] CPU: 0 Not tainted (3.3.0-rc1-00008-g45030e9 #992) [ 1.515289] PC is at 0xffff0018 [ 1.518615] LR is at omap_hdq_probe+0xd4/0x2cc The OMAP4430 ES2 Rev X TRM does warn about this restriction in section 23.2.6.2 "HDQ/1-Wire Registers". Fixes the crash on OMAP4430 ES2 Pandaboard. Tested also on OMAP34xx and OMAP2420; it seems to work fine on those chips, although due to the lack of boards with HDQ/1-wire devices here, a more indepth test was not possible. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: NeilBrown <neilb@suse.de> Cc: Evgeniy Polyakov <zbr@ioremap.net> Acked-by: Evgeniy Polyakov <zbr@ioremap.net> |
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| .. | ||
| masters | ||
| slaves | ||
| Kconfig | ||
| Makefile | ||
| w1_family.c | ||
| w1_family.h | ||
| w1_int.c | ||
| w1_int.h | ||
| w1_io.c | ||
| w1_log.h | ||
| w1_netlink.c | ||
| w1_netlink.h | ||
| w1.c | ||
| w1.h | ||