Catalin Marinas abaf48a05a [PATCH] ARM: 2779/1: Fix the V bit setting for the ARM1020x CPUs ... Patch from Catalin Marinas This patch fixes the V bit setting for the ARM1020x processors. At reset, this bit is automatically set to the value of the HIVECSINIT input signal which just happened to be 1 but it is not mandatory. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2005-06-30 17:04:14 +01:00
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abort-ev4.S
abort-ev4t.S
abort-ev5t.S
abort-ev5tj.S
abort-ev6.S
abort-lv4t.S
abort-macro.S
alignment.c
blockops.c
cache-v3.S
cache-v4.S
cache-v4wb.S
cache-v4wt.S
cache-v6.S
consistent.c
copypage-v3.S
copypage-v4mc.c
copypage-v4wb.S
copypage-v4wt.S
copypage-v6.c
copypage-xscale.c
discontig.c
extable.c
fault-armv.c
fault.c
fault.h
flush.c
init.c
ioremap.c
Kconfig
Makefile
mm-armv.c
mmap.c
mmu.c
proc-arm6_7.S
proc-arm720.S
proc-arm920.S
proc-arm922.S
proc-arm925.S
proc-arm926.S
proc-arm1020.S	[PATCH] ARM: 2779/1: Fix the V bit setting for the ARM1020x CPUs	2005-06-30 17:04:14 +01:00
proc-arm1020e.S	[PATCH] ARM: 2779/1: Fix the V bit setting for the ARM1020x CPUs	2005-06-30 17:04:14 +01:00
proc-arm1022.S
proc-arm1026.S
proc-macros.S
proc-sa110.S
proc-sa1100.S
proc-syms.c
proc-v6.S
proc-xscale.S
tlb-v3.S
tlb-v4.S
tlb-v4wb.S
tlb-v4wbi.S
tlb-v6.S