b027274d2e
A call to request_mem_region() has been introduced in the omap-gpio
driver recently (commit 96751fcbe5
,
"gpio/omap: Use devm_ API and add request_mem_region"). This change
prevented the Amstrad Delta NAND driver, which was doing the same in
order to take control over OMAP MPU I/O lines that the NAND device hangs
off, from loading successfully.
The I/O lines and corresponding registers used by the NAND driver are a
subset of those used for the GPIO function. Then, to avoid run time
collisions, all MPUIO GPIO lines should be marked as requested while
initializing the NAND driver, and vice versa, a single MPUIO GPIO line
already requested before the NAND driver initialization is attempted
should prevent the NAND device from being started successfully.
There is another driver, omap-keypad, which also manipulates MPUIO
registers, but has never been calling request_mem_region() on startup,
so it's not affected by the change in the gpio-omap and works correctly.
It uses the depreciated omap_read/write functions for accessing MPUIO
registers. Unlike the NAND driver, these I/O lines and registers are
separate from those used by the GPIO driver. However, both register sets
are non-contiguous and overlapping, so it would be impractical to
request the two sets separately, one from the gpio-omap, the other form
the omap-keypad driver.
In order to solve all these issues correctly, a solution first suggested
by Artem Bityutskiy, then closer specified by Tony Lindgren while they
commented the initial version of this fix, should be implemented. The
gpio-omap driver should export a few functions which would allow the
other two drivers to access MPUIO registers in a safe manner instead of
trying to manage them in parallel to the GPIO driver. However, such a
big change, affecting 3 drivers all together, is not suitable for the rc
cycle, and should be prepared for the merge window. Then, an
alternative solution is proposed as a regression fix.
For the ams-delta NAND driver to initialize correctly in coexistence
with the changed GPIO driver, drop the request_mem_region() call from
the former, especially as this call is going to be removed while the
long-term solution is implemented.
Tested on Amstrad Delta.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
313 lines
7.3 KiB
C
313 lines
7.3 KiB
C
/*
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* drivers/mtd/nand/ams-delta.c
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*
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* Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
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*
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* Derived from drivers/mtd/toto.c
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* Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
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* Partially stolen from drivers/mtd/nand/plat_nand.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Overview:
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* This is a device driver for the NAND flash device found on the
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* Amstrad E3 (Delta).
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*/
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <asm/io.h>
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#include <mach/hardware.h>
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#include <asm/sizes.h>
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#include <linux/gpio.h>
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#include <plat/board-ams-delta.h>
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/*
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* MTD structure for E3 (Delta)
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*/
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static struct mtd_info *ams_delta_mtd = NULL;
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/*
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* Define partitions for flash devices
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*/
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static struct mtd_partition partition_info[] = {
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{ .name = "Kernel",
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.offset = 0,
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.size = 3 * SZ_1M + SZ_512K },
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{ .name = "u-boot",
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.offset = 3 * SZ_1M + SZ_512K,
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.size = SZ_256K },
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{ .name = "u-boot params",
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.offset = 3 * SZ_1M + SZ_512K + SZ_256K,
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.size = SZ_256K },
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{ .name = "Amstrad LDR",
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.offset = 4 * SZ_1M,
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.size = SZ_256K },
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{ .name = "File system",
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.offset = 4 * SZ_1M + 1 * SZ_256K,
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.size = 27 * SZ_1M },
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{ .name = "PBL reserved",
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.offset = 32 * SZ_1M - 3 * SZ_256K,
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.size = 3 * SZ_256K },
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};
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static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
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{
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struct nand_chip *this = mtd->priv;
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void __iomem *io_base = this->priv;
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writew(0, io_base + OMAP_MPUIO_IO_CNTL);
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writew(byte, this->IO_ADDR_W);
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gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 0);
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ndelay(40);
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gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 1);
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}
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static u_char ams_delta_read_byte(struct mtd_info *mtd)
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{
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u_char res;
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struct nand_chip *this = mtd->priv;
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void __iomem *io_base = this->priv;
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gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0);
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ndelay(40);
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writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
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res = readw(this->IO_ADDR_R);
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gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 1);
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return res;
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}
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static void ams_delta_write_buf(struct mtd_info *mtd, const u_char *buf,
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int len)
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{
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int i;
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for (i=0; i<len; i++)
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ams_delta_write_byte(mtd, buf[i]);
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}
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static void ams_delta_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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{
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int i;
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for (i=0; i<len; i++)
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buf[i] = ams_delta_read_byte(mtd);
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}
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static int ams_delta_verify_buf(struct mtd_info *mtd, const u_char *buf,
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int len)
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{
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int i;
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for (i=0; i<len; i++)
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if (buf[i] != ams_delta_read_byte(mtd))
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return -EFAULT;
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return 0;
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}
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/*
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* Command control function
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*
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* ctrl:
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* NAND_NCE: bit 0 -> bit 2
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* NAND_CLE: bit 1 -> bit 7
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* NAND_ALE: bit 2 -> bit 6
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*/
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static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
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unsigned int ctrl)
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{
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if (ctrl & NAND_CTRL_CHANGE) {
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gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NCE,
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(ctrl & NAND_NCE) == 0);
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gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_CLE,
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(ctrl & NAND_CLE) != 0);
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gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_ALE,
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(ctrl & NAND_ALE) != 0);
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}
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if (cmd != NAND_CMD_NONE)
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ams_delta_write_byte(mtd, cmd);
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}
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static int ams_delta_nand_ready(struct mtd_info *mtd)
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{
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return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
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}
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static const struct gpio _mandatory_gpio[] = {
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{
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.gpio = AMS_DELTA_GPIO_PIN_NAND_NCE,
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.flags = GPIOF_OUT_INIT_HIGH,
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.label = "nand_nce",
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},
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{
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.gpio = AMS_DELTA_GPIO_PIN_NAND_NRE,
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.flags = GPIOF_OUT_INIT_HIGH,
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.label = "nand_nre",
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},
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{
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.gpio = AMS_DELTA_GPIO_PIN_NAND_NWP,
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.flags = GPIOF_OUT_INIT_HIGH,
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.label = "nand_nwp",
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},
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{
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.gpio = AMS_DELTA_GPIO_PIN_NAND_NWE,
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.flags = GPIOF_OUT_INIT_HIGH,
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.label = "nand_nwe",
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},
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{
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.gpio = AMS_DELTA_GPIO_PIN_NAND_ALE,
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.flags = GPIOF_OUT_INIT_LOW,
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.label = "nand_ale",
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},
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{
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.gpio = AMS_DELTA_GPIO_PIN_NAND_CLE,
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.flags = GPIOF_OUT_INIT_LOW,
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.label = "nand_cle",
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},
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};
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/*
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* Main initialization routine
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*/
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static int __devinit ams_delta_init(struct platform_device *pdev)
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{
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struct nand_chip *this;
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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void __iomem *io_base;
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int err = 0;
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if (!res)
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return -ENXIO;
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/* Allocate memory for MTD device structure and private data */
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ams_delta_mtd = kmalloc(sizeof(struct mtd_info) +
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sizeof(struct nand_chip), GFP_KERNEL);
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if (!ams_delta_mtd) {
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printk (KERN_WARNING "Unable to allocate E3 NAND MTD device structure.\n");
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err = -ENOMEM;
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goto out;
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}
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ams_delta_mtd->owner = THIS_MODULE;
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/* Get pointer to private data */
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this = (struct nand_chip *) (&ams_delta_mtd[1]);
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/* Initialize structures */
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memset(ams_delta_mtd, 0, sizeof(struct mtd_info));
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memset(this, 0, sizeof(struct nand_chip));
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/* Link the private data with the MTD structure */
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ams_delta_mtd->priv = this;
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/*
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* Don't try to request the memory region from here,
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* it should have been already requested from the
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* gpio-omap driver and requesting it again would fail.
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*/
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io_base = ioremap(res->start, resource_size(res));
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if (io_base == NULL) {
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dev_err(&pdev->dev, "ioremap failed\n");
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err = -EIO;
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goto out_free;
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}
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this->priv = io_base;
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/* Set address of NAND IO lines */
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this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH;
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this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT;
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this->read_byte = ams_delta_read_byte;
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this->write_buf = ams_delta_write_buf;
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this->read_buf = ams_delta_read_buf;
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this->verify_buf = ams_delta_verify_buf;
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this->cmd_ctrl = ams_delta_hwcontrol;
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if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) {
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this->dev_ready = ams_delta_nand_ready;
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} else {
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this->dev_ready = NULL;
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printk(KERN_NOTICE "Couldn't request gpio for Delta NAND ready.\n");
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}
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/* 25 us command delay time */
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this->chip_delay = 30;
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this->ecc.mode = NAND_ECC_SOFT;
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platform_set_drvdata(pdev, io_base);
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/* Set chip enabled, but */
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err = gpio_request_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
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if (err)
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goto out_gpio;
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/* Scan to find existence of the device */
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if (nand_scan(ams_delta_mtd, 1)) {
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err = -ENXIO;
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goto out_mtd;
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}
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/* Register the partitions */
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mtd_device_register(ams_delta_mtd, partition_info,
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ARRAY_SIZE(partition_info));
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goto out;
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out_mtd:
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gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
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out_gpio:
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platform_set_drvdata(pdev, NULL);
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gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
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iounmap(io_base);
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out_free:
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kfree(ams_delta_mtd);
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out:
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return err;
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}
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/*
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* Clean up routine
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*/
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static int __devexit ams_delta_cleanup(struct platform_device *pdev)
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{
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void __iomem *io_base = platform_get_drvdata(pdev);
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/* Release resources, unregister device */
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nand_release(ams_delta_mtd);
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gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
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gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
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iounmap(io_base);
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/* Free the MTD device structure */
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kfree(ams_delta_mtd);
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return 0;
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}
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static struct platform_driver ams_delta_nand_driver = {
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.probe = ams_delta_init,
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.remove = __devexit_p(ams_delta_cleanup),
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.driver = {
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.name = "ams-delta-nand",
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.owner = THIS_MODULE,
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},
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};
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module_platform_driver(ams_delta_nand_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>");
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MODULE_DESCRIPTION("Glue layer for NAND flash on Amstrad E3 (Delta)");
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