Robert Richter 27afdf2008 apic, x86: Use BIOS settings for IBS and MCE threshold interrupt LVT offsets ... We want the BIOS to setup the EILVT APIC registers. The offsets were hardcoded and BIOS settings were overwritten by the OS. Now, the subsystems for MCE threshold and IBS determine the LVT offset from the registers the BIOS has setup. If the BIOS setup is buggy on a family 10h system, a workaround enables IBS. If the OS determines an invalid register setup, a "[Firmware Bug]: " error message is reported. We need this change also for upcomming cpu families. Signed-off-by: Robert Richter <robert.richter@amd.com> LKML-Reference: <1286360874-1471-3-git-send-email-robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>		2010-10-20 04:42:13 +02:00
..
backtrace.c	perf events, x86/stacktrace: Make stack walking optional	2009-12-17 09:56:19 +01:00
init.c
Makefile	x86/oprofile: reanaming op_model_athlon.c to op_model_amd.c	2008-07-26 11:48:14 +02:00
nmi_int.c	oprofile: Add Support for Intel CPU Family 6 / Model 29	2010-09-21 12:22:48 +02:00
nmi_timer_int.c
op_counter.h	oprofile: Implement performance counter multiplexing	2009-07-20 16:33:53 +02:00
op_model_amd.c	apic, x86: Use BIOS settings for IBS and MCE threshold interrupt LVT offsets	2010-10-20 04:42:13 +02:00
op_model_p4.c	oprofile/x86: return -EBUSY if counters are already reserved	2010-05-04 11:35:28 +02:00
op_model_ppro.c	Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip	2010-05-18 08:19:03 -07:00
op_x86_model.h	oprofile/x86: make AMD IBS hotplug capable	2010-05-06 15:11:15 +02:00